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    <title>i.MX ProcessorsのトピックRe: i.MX93: FlexSPI Sample Clock Source for reading</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1963652#M229026</link>
    <description>&lt;P&gt;We managed to modify FlexSPI driver (currently on linux 6.1) to accept different&amp;nbsp;MCR0[RXCLKSRC]. First Tests with SPI 1-4-4&amp;nbsp;@114MHz looking good.&lt;/P&gt;</description>
    <pubDate>Fri, 27 Sep 2024 15:56:25 GMT</pubDate>
    <dc:creator>Niebel-TQ</dc:creator>
    <dc:date>2024-09-27T15:56:25Z</dc:date>
    <item>
      <title>i.MX93: FlexSPI Sample Clock Source for reading</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1940148#M227679</link>
      <description>&lt;P&gt;i.MX93 has only one pin usable for FlexSPI strobe. When using eMMC with HS400 /HS400-ES the same pin is needed as Data Strobe for eMMC. In the reference manual chapter&lt;EM&gt;36.8.2.2 Module Control 0 (MCR0) &lt;/EM&gt;states, that Field RXCLKsrc=10b can be used to use higher SCLK and achieve higher read data rates.&lt;/P&gt;&lt;P&gt;Since this mode is not implemented in BSP: is this mode tested and usable? Looking at other i.MX CPU (i.MX8MP) the value of&amp;nbsp;RXCLKsrc=10b is marked as reserved. If it can be used, are there other configurations that needs to be adjusted?&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/69515"&gt;@florian_arndt&lt;/a&gt; +&amp;nbsp;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/175204"&gt;@danny_john&lt;/a&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 26 Aug 2024 08:32:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1940148#M227679</guid>
      <dc:creator>Niebel-TQ</dc:creator>
      <dc:date>2024-08-26T08:32:28Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93: FlexSPI Sample Clock Source for reading</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1940777#M227695</link>
      <description>&lt;P&gt;As I known, the customer tested this on imx8mp successfully, besides of&amp;nbsp;Setting &lt;SPAN&gt;RXCLKsrc to 10b,&amp;nbsp; also setting&amp;nbsp;&lt;/SPAN&gt;SION to 1 on IOMUXC_SW_MUX_CTL_PAD_NAND_DQS, maybe you can try it on imx93&lt;/P&gt;</description>
      <pubDate>Tue, 27 Aug 2024 01:31:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1940777#M227695</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2024-08-27T01:31:37Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93: FlexSPI Sample Clock Source for reading</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1941204#M227718</link>
      <description>&lt;P&gt;The DQS Signal for FlexSPI is only muxable at the very same pin that is already used for EMMC Strobe. This is the reason why asking for MCR0[RXCLKSRC] = 10b (SCK output and loopback from SCK pad).&lt;BR /&gt;&lt;BR /&gt;This means setting this mode _and_SION for&amp;nbsp;SW_MUX_CTL_PAD_SD3_CLK muxed as&amp;nbsp;FLEXSPI1_A_SCLK, rigth?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 27 Aug 2024 10:14:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1941204#M227718</guid>
      <dc:creator>Niebel-TQ</dc:creator>
      <dc:date>2024-08-27T10:14:51Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93: FlexSPI Sample Clock Source for reading</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1941453#M227728</link>
      <description>&lt;P&gt;Just a follow up question. The mode 10b (&lt;SPAN&gt;SCLK output clock and looped back from SCLK pad&lt;/SPAN&gt;) is not mentioned in the data sheet. What is the SCLK rate that is achievable in this mode?&lt;/P&gt;</description>
      <pubDate>Tue, 27 Aug 2024 16:58:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1941453#M227728</guid>
      <dc:creator>Niebel-TQ</dc:creator>
      <dc:date>2024-08-27T16:58:20Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93: FlexSPI Sample Clock Source for reading</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1947934#M228077</link>
      <description>&lt;P&gt;I confirmed that imx93 doesn't have this issue,&amp;nbsp; you can try to use this bit directly, for the clock, pls refer to the data sheet as below&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="joanxie_0-1725520037439.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/297291iB1CD6BE152391006/image-size/medium?v=v2&amp;amp;px=400" role="button" title="joanxie_0-1725520037439.png" alt="joanxie_0-1725520037439.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;joanxie_0-1725520037439.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 05 Sep 2024 07:07:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1947934#M228077</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2024-09-05T07:07:47Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93: FlexSPI Sample Clock Source for reading</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1963652#M229026</link>
      <description>&lt;P&gt;We managed to modify FlexSPI driver (currently on linux 6.1) to accept different&amp;nbsp;MCR0[RXCLKSRC]. First Tests with SPI 1-4-4&amp;nbsp;@114MHz looking good.&lt;/P&gt;</description>
      <pubDate>Fri, 27 Sep 2024 15:56:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1963652#M229026</guid>
      <dc:creator>Niebel-TQ</dc:creator>
      <dc:date>2024-09-27T15:56:25Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX93: FlexSPI Sample Clock Source for reading</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1963897#M229061</link>
      <description>&lt;P&gt;glad to hear this, I will close this tread if you don't have further issue about this&lt;/P&gt;</description>
      <pubDate>Sun, 29 Sep 2024 03:52:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX93-FlexSPI-Sample-Clock-Source-for-reading/m-p/1963897#M229061</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2024-09-29T03:52:17Z</dc:date>
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