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    <title>topic 回复： AHB read ECC support - ECC write data generation using software in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/AHB-read-ECC-support-ECC-write-data-generation-using-software/m-p/1958260#M228687</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/240551"&gt;@pcchang&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Thanks for your interest in NXP MIMXRT series!&lt;/P&gt;
&lt;P&gt;In the process you mentioned, the calculation is done by one combination per 4 bits. Divide the 32-bit wdata_swap into 8 combinations, then each is a 1*4 matrix, and multiply it with a 4*4 matrix to get another 1*4 matrix. It is the corresponding four bits in wdata_ECC.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Gavin&lt;/P&gt;</description>
    <pubDate>Fri, 20 Sep 2024 03:12:13 GMT</pubDate>
    <dc:creator>Gavin_Jia</dc:creator>
    <dc:date>2024-09-20T03:12:13Z</dc:date>
    <item>
      <title>AHB read ECC support - ECC write data generation using software</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/AHB-read-ECC-support-ECC-write-data-generation-using-software/m-p/1954123#M228421</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;We are studying the i.MX RT1170 Processor Reference Manual, chapter 30 FlexSPI Controller, 30.3.10 AHB read ECC support. There is a paragraph explaining the generation of wdata_ECC_swap from wdata. We are confused with step 2, converting&amp;nbsp;32 bits of wdata_swap into wdata_ECC. Specifically, how the matrix is applied ?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="pcchang_0-1726217637863.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/299029i002E67EFE5B49BF1/image-size/medium?v=v2&amp;amp;px=400" role="button" title="pcchang_0-1726217637863.png" alt="pcchang_0-1726217637863.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-Chang&lt;/P&gt;</description>
      <pubDate>Fri, 13 Sep 2024 08:54:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/AHB-read-ECC-support-ECC-write-data-generation-using-software/m-p/1954123#M228421</guid>
      <dc:creator>pcchang</dc:creator>
      <dc:date>2024-09-13T08:54:30Z</dc:date>
    </item>
    <item>
      <title>回复： AHB read ECC support - ECC write data generation using software</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/AHB-read-ECC-support-ECC-write-data-generation-using-software/m-p/1958260#M228687</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/240551"&gt;@pcchang&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Thanks for your interest in NXP MIMXRT series!&lt;/P&gt;
&lt;P&gt;In the process you mentioned, the calculation is done by one combination per 4 bits. Divide the 32-bit wdata_swap into 8 combinations, then each is a 1*4 matrix, and multiply it with a 4*4 matrix to get another 1*4 matrix. It is the corresponding four bits in wdata_ECC.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Gavin&lt;/P&gt;</description>
      <pubDate>Fri, 20 Sep 2024 03:12:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/AHB-read-ECC-support-ECC-write-data-generation-using-software/m-p/1958260#M228687</guid>
      <dc:creator>Gavin_Jia</dc:creator>
      <dc:date>2024-09-20T03:12:13Z</dc:date>
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