<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: librpmsg_lite-imx part 3 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/librpmsg-lite-imx-part-3/m-p/1956315#M228548</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/171173"&gt;@AldoG&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm not sure I understand what you have said.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I thought that RPMsg Lite already used a shared memory area in DDR (in my imx_init_raminfo.c I have reserved the last 8MiB of the 1GiB memory installed in the system).&amp;nbsp; With the comments in the header file about &lt;SPAN&gt;RL_BUFFER_PAYLOAD_SIZE and RL_BUFFER_COUNT it doesn't seem to suggest that only a few flags.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Can you provide a GitHub link to the example that you mentioned and I'll take a look at it to see if it provides any inspiration.&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;-Andy.&lt;/P&gt;</description>
    <pubDate>Wed, 18 Sep 2024 07:07:16 GMT</pubDate>
    <dc:creator>wonk-andy</dc:creator>
    <dc:date>2024-09-18T07:07:16Z</dc:date>
    <item>
      <title>librpmsg_lite-imx part 3</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/librpmsg-lite-imx-part-3/m-p/1955156#M228459</link>
      <description>&lt;P&gt;Following on from all the work we did in&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/librpmsg-lite-imx-part-2/" target="_self"&gt;librpmsg_lite-imx part 2&lt;/A&gt;&amp;nbsp;I am trying to maximise the performance of the communication between the i.MX8M Mini Cortex-M4 (bare metal) and a QNX application running on the Cortex-A53 using the librpmsg_lite-imx library.&lt;/P&gt;&lt;P&gt;Some questions...&lt;/P&gt;&lt;P&gt;I am currently sending a 212byte message every 10ms from the firmware running on the Cortex-M4 (the remote end of the connection).&amp;nbsp; I'm not seeing any send errors but is that rate possible or am I missing data and not noticing, bearing in mind this is bare metal and no queue.&amp;nbsp; What is the maximum theoretical throughput?&lt;/P&gt;&lt;P&gt;In the multicore examples in the MIMX8MM SDK both of the remote examples have files called rsc_table.[c|h] which defines a remote resource table.&amp;nbsp; What is this used for?&amp;nbsp; As I increase the number of buffers that defined do I need to increase &lt;FONT face="courier new,courier"&gt;VRING_SIZE&lt;/FONT&gt;?&lt;/P&gt;&lt;P&gt;To give some scope for adding to the size of the data being sent, I have &lt;SPAN&gt;&lt;FONT face="courier new,courier"&gt;RL_BUFFER_PAYLOAD_SIZE&lt;/FONT&gt; set to 496 and&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;FONT face="courier new,courier"&gt;RL_BUFFER_COUNT&lt;/FONT&gt; set to 2048.&amp;nbsp; Does changing these have an impact on the definition of &lt;FONT face="courier new,courier"&gt;VRING_SIZE&lt;/FONT&gt;?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;-Andy.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 16 Sep 2024 11:16:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/librpmsg-lite-imx-part-3/m-p/1955156#M228459</guid>
      <dc:creator>wonk-andy</dc:creator>
      <dc:date>2024-09-16T11:16:29Z</dc:date>
    </item>
    <item>
      <title>Re: librpmsg_lite-imx part 3</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/librpmsg-lite-imx-part-3/m-p/1955781#M228503</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;Please note that it is not recommended to use such a large messages, as the message should only include certain flags to let know the other processor that data is ready.&lt;/P&gt;
&lt;P&gt;i.e. in our i.MX MScale SDK we have a demo that&amp;nbsp; A core decoded music data and put it to DDR buffer and informs M core with the related information. &lt;BR /&gt;Then M core will take the ownership of consuming the buffer, it will copy buffer from DDR to TCM.&lt;BR /&gt;&lt;BR /&gt;Best regards/Saludos,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Tue, 17 Sep 2024 17:30:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/librpmsg-lite-imx-part-3/m-p/1955781#M228503</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2024-09-17T17:30:00Z</dc:date>
    </item>
    <item>
      <title>Re: librpmsg_lite-imx part 3</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/librpmsg-lite-imx-part-3/m-p/1956315#M228548</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/171173"&gt;@AldoG&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm not sure I understand what you have said.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I thought that RPMsg Lite already used a shared memory area in DDR (in my imx_init_raminfo.c I have reserved the last 8MiB of the 1GiB memory installed in the system).&amp;nbsp; With the comments in the header file about &lt;SPAN&gt;RL_BUFFER_PAYLOAD_SIZE and RL_BUFFER_COUNT it doesn't seem to suggest that only a few flags.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Can you provide a GitHub link to the example that you mentioned and I'll take a look at it to see if it provides any inspiration.&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;-Andy.&lt;/P&gt;</description>
      <pubDate>Wed, 18 Sep 2024 07:07:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/librpmsg-lite-imx-part-3/m-p/1956315#M228548</guid>
      <dc:creator>wonk-andy</dc:creator>
      <dc:date>2024-09-18T07:07:16Z</dc:date>
    </item>
  </channel>
</rss>

