IMX8MN Cortex-M7 ECSPI with SDMA - SDMA interrupt is generated before transmission

okobelnc — Sun, 15 Sep 2024 10:44:24 GMT

Hi. I am using IMX8MN cortex-m7 core, and want to use the ECSPI2 peripheral as a SPI master with SDMA.

I see that a lot of times, the SDMA1 interrupt for the TX channel is generated in the middle of ECSPI_MasterTransferSDMA, right after its call to SDMA_ConfigBufferDescriptor:

Since the interrupt is generated at this moment before starting the transmission, the

SDMA_EcspiMasterCallback callback disables the ECSPI peripheral and the transmission and aborts all the SPI transaction before it started.

Here is my ECSPI and DMA configuration:

typedef union

{

ecspi_master_config_t tMasterConfig;

ecspi_slave_config_t tSlaveConfig;

}CTHAL_SPI_NXP_FSL_Config_t;

#define UNUSED_CFG (0)

#define NETX90_CS_GPIO_PORT (GPIO5)

#define NETX90_CS_PIN_NUM (13)

#define NETX90_SPI_PERIPHERAL (ECSPI2)

#define NETX90_SPI_PERIPHERAL_SRC_CLK_HZ (80000000) /*!< 80MHz is the source clock of the ECSPI2 peripheral */

#define ONE_BYTE_BURST_LENGTH (8)

#define NETX90_SPI_BAUDRATE_BPS (23000000) /*!< 23MHz CLK */

#define SPI_CS_NO_DELAY (0)

#define SPI_SAMPLE_PERIOD_0 (0)

#define SPI_TX_FIFO_THRESHOLD (1)

#define SPI_RX_FIFO_THRESHOLD (0)

#define NETX90_SPI_SDMA_PERIPHERAL (SDMAARM1) /*!< ECSPI2 DMA is supported only by SDMA1 */

#define INIT_STRUCT_ZEROS {0}

#define NETX90_SPI_SDMA_RX_CHANNEL (1)

#define NETX90_SPI_SDMA_TX_CHANNEL (2)

#define NETX90_SPI_SDMA_RX_CH_PRIO (3)

#define NETX90_SPI_SDMA_TX_CH_PRIO (2)

#define NETX90_SPI_EVT_SRC_TX (3) /*!< According to the reference manual - ECSPI2 Tx request */

#define NETX90_SPI_EVT_SRC_RX (2) /*!< According to the reference manual - ECSPI2 Rx request */

static CTHAL_SPI_NXP_FSL_Config_t s_tNetX90_SPI_Cfg =

{

.tMasterConfig =

{

.channel = kECSPI_Channel0,

.burstLength = ONE_BYTE_BURST_LENGTH,

.samplePeriodClock = kECSPI_spiClock,

.baudRate_Bps = NETX90_SPI_BAUDRATE_BPS,

.chipSelectDelay = SPI_CS_NO_DELAY,

.samplePeriod = SPI_SAMPLE_PERIOD_0,

.txFifoThreshold = SPI_TX_FIFO_THRESHOLD,

.rxFifoThreshold = SPI_RX_FIFO_THRESHOLD,

.enableLoopback = false,

.channelConfig = {

.channelMode = kECSPI_Master,

.clockInactiveState = kECSPI_ClockInactiveStateLow,

.dataLineInactiveState = kECSPI_DataLineInactiveStateLow,

.chipSlectActiveState = kECSPI_ChipSelectActiveStateLow,

.phase = kECSPI_ClockPhaseSecondEdge,

.polarity = kECSPI_PolarityActiveLow,

};

static sdma_config_t s_tNetX90_SPI_SDMA_Cfg =

{

.enableRealTimeDebugPin = false,

.isSoftwareResetClearLock = true,

.ratio = kSDMA_HalfARMClockFreq,

};

static CTHAL_SPI_NXP_FSL_SDMA_Handles_t s_tNetX90_SPI_SDMA_Handles __attribute__((aligned(4))) =

{

.tSDMATXHandle = INIT_STRUCT_ZEROS,

.tSDMARXHandle = INIT_STRUCT_ZEROS,

};

static CTHAL_SPI_NXP_FSL_SDMA_Context_Data_t s_tNetX90_SPI_SDMA_Context_Data __attribute__((aligned(4))) =

{

.tSDMATXContextData = INIT_STRUCT_ZEROS,

.tSDMARXContextData = INIT_STRUCT_ZEROS,

};

static CTHAL_SPI_NXP_FSL_DMA_Cfg_t s_tNetX90_SPI_DMA_Cfg __attribute__((aligned(4))) =

{

.ptSDMAConfig = &s_tNetX90_SPI_SDMA_Cfg,

.ptSDMAAddr = SDMAARM1,

.ptSDMAHandles = &s_tNetX90_SPI_SDMA_Handles,

.ptSDMAContextData = &s_tNetX90_SPI_SDMA_Context_Data,

.ulTXDMAChannelNum = NETX90_SPI_SDMA_TX_CHANNEL,

.ulRXDMAChannelNum = NETX90_SPI_SDMA_RX_CHANNEL,

.bTXDMAChannelPriority = NETX90_SPI_SDMA_TX_CH_PRIO,

.bRXDMAChannelPriority = NETX90_SPI_SDMA_RX_CH_PRIO,

.ulEventSourceTx = NETX90_SPI_EVT_SRC_TX,

.ulEventSourceRx = NETX90_SPI_EVT_SRC_RX,

};

static CTHAL_SPI_NXP_FSL_ECSPI_Handle_t s_tNetX90_SPI_Handle __attribute__((aligned(4))) =

{

.tSDMAHandle = INIT_STRUCT_ZEROS,

};

How can I resolve this issue?

Thanks,

Ofir

Re: IMX8MN Cortex-M7 ECSPI with SDMA - SDMA interrupt is generated before transmission

Rita_Wang — Tue, 05 Nov 2024 03:23:49 GMT

I already follow your quesitons in the case you create.

topic IMX8MN Cortex-M7 ECSPI with SDMA - SDMA interrupt is generated before transmission in i.MX Processors

IMX8MN Cortex-M7 ECSPI with SDMA - SDMA interrupt is generated before transmission

Re: IMX8MN Cortex-M7 ECSPI with SDMA - SDMA interrupt is generated before transmission