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    <title>i.MX ProcessorsのトピックRe: Is it required to add the package delay in PCB Routing for DDR3L with I.MX6</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Is-it-required-to-add-the-package-delay-in-PCB-Routing-for-DDR3L/m-p/1944149#M227845</link>
    <description>&lt;P&gt;You need to following our hardware guide document and our reference design&lt;/P&gt;</description>
    <pubDate>Fri, 30 Aug 2024 06:04:21 GMT</pubDate>
    <dc:creator>Rita_Wang</dc:creator>
    <dc:date>2024-08-30T06:04:21Z</dc:date>
    <item>
      <title>Is it required to add the package delay in PCB Routing for DDR3L with I.MX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Is-it-required-to-add-the-package-delay-in-PCB-Routing-for-DDR3L/m-p/1937176#M227525</link>
      <description>&lt;P&gt;Hi Team,&lt;/P&gt;&lt;P&gt;One of my project I am using I.Mx6 (MCIMX6Q6AVT10AD) and 4 Dram Chip (MT41K256M16TW-107 AAT:P). each is 256MB.(Total 1GB DDR).&lt;/P&gt;&lt;P&gt;I have a four questions here:&lt;/P&gt;&lt;P&gt;1. For PCB Routing, Do we need to include the package delay in PCB trace length?&lt;/P&gt;&lt;P&gt;This package delay taken from Ibis Model of&amp;nbsp;(MCIMX6Q6AVT10AD).&lt;/P&gt;&lt;P&gt;2.does it require to add all package delay for all address, command, control signals,data and data strobe in the PCB Trace length?&lt;/P&gt;&lt;P&gt;3. as per the design guidelines (IMX6DQ6SDLHDG.pdf) page no. 41 &amp;amp; 42.&lt;/P&gt;&lt;P&gt;The clock length match mentioned 2.25 inches max.&lt;/P&gt;&lt;P&gt;does this included the package delay of 2.25 inches or excluded?&lt;/P&gt;&lt;P&gt;4. Please confirm,&lt;/P&gt;&lt;P&gt;i) The clock length match with the address, cmd,control should be (clockmin-200 to clock min)&lt;/P&gt;&lt;P&gt;i.e if clock length is 2000mils,&amp;nbsp;The clock length match with the address, cmd,control should be 1800 to 2000mils.&lt;/P&gt;&lt;P&gt;ii) Match the signal 25 mils,&lt;/P&gt;&lt;P&gt;address, cmd,control should match within this 25mils. or&lt;/P&gt;&lt;P&gt;with respect to clock.&amp;nbsp;address, cmd,control should match within this 25mils.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Mohamedsidiq_0-1724226927755.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/294442iAEBA3ADD147E9384/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Mohamedsidiq_0-1724226927755.png" alt="Mohamedsidiq_0-1724226927755.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;Mohamedsidiq_0-1724226927755.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Mohamed A S.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 21 Aug 2024 08:08:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Is-it-required-to-add-the-package-delay-in-PCB-Routing-for-DDR3L/m-p/1937176#M227525</guid>
      <dc:creator>Mohamedsidiq</dc:creator>
      <dc:date>2024-08-21T08:08:56Z</dc:date>
    </item>
    <item>
      <title>Re: Is it required to add the package delay in PCB Routing for DDR3L with I.MX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Is-it-required-to-add-the-package-delay-in-PCB-Routing-for-DDR3L/m-p/1944149#M227845</link>
      <description>&lt;P&gt;You need to following our hardware guide document and our reference design&lt;/P&gt;</description>
      <pubDate>Fri, 30 Aug 2024 06:04:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Is-it-required-to-add-the-package-delay-in-PCB-Routing-for-DDR3L/m-p/1944149#M227845</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2024-08-30T06:04:21Z</dc:date>
    </item>
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