topic Re: iMX93 : GPIO Read/Write Timings in i.MX Processors

iMX93 : GPIO Read/Write Timings

pratibha — Sun, 11 Aug 2024 12:51:46 GMT

I am exploring iMX93 Application Processor.

In which I have some queries regarding GPIO:

How many clock cycles are required to read a GPIO from CM33 and A55 core?
Can we read multiple GPIOs parallel?
And how much approximate time required to read a GPIO?

In refrence manual, in GPIO section

"28.3.5 Clocking
GPIO receives a single clock, which is used for register access and synchronization with external pin inputs. There are no special considerations."

What does above sentence represents ?

Regards,

Pratibha

Re: iMX93 : GPIO Read/Write Timings

Zhiming_Liu — Fri, 16 Aug 2024 04:19:11 GMT

For all available module timing, please refer 4.8 System modules timing and 4.6 I/O AC parameters in datasheet

https://www.nxp.com.cn/docs/en/data-sheet/IMX93XEC.pdf

Best Regards
Zhiming

Re: iMX93 : GPIO Read/Write Timings

pratibha — Tue, 20 Aug 2024 13:33:20 GMT

Hi Zhiming,

Thank you for the response. I had referred "4.8 System modules timing and 4.6 I/O AC parameters in datasheet".

In 4.6 section, output transition and rise/fall time given for GPIO. Whereas our main requirement is calculate the GPIO read access time using ARM Cortex-M33.

Please provide the information of number of clock cycles required to read the GPIO from ARM Cortex-M33.

Thanks,

Pratibha