i.MX ProcessorsのトピックRe: imx6solo and LPDDR2 Stress Testing

imx6solo and LPDDR2 Stress Testing

deepaktajanpure — Thu, 11 Jul 2024 05:09:57 GMT

Hi, I want to do LPDDR2 Stress testing on imx6solo custom board. So will you please provide .inc file or any other utility for doing this. DDR Used is MT42L16M32D1HE-18

Re: imx6solo and LPDDR2 Stress Testing

pengyong_zhang — Thu, 11 Jul 2024 06:07:35 GMT

hi, @deepaktajanpure

You can get the resource follow the below link:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-6-7-Series-DDR-Tool-Release/ta-p/1271415

B.R

Re: imx6solo and LPDDR2 Stress Testing

deepaktajanpure — Fri, 12 Jul 2024 03:54:39 GMT

We have modified the excel sheet (attached herewith) for MT42L16M32D1HE-18, Can you please review it?

Re: imx6solo and LPDDR2 Stress Testing

pengyong_zhang — Mon, 15 Jul 2024 01:51:26 GMT

hi, @deepaktajanpure

Sure, please share your DDR Datasheet.

B.R

Re: imx6solo and LPDDR2 Stress Testing

deepaktajanpure — Mon, 15 Jul 2024 03:43:19 GMT

Please find datasheet attached herewith

Re: imx6solo and LPDDR2 Stress Testing

deepaktajanpure — Mon, 15 Jul 2024 04:11:46 GMT

Please see imx6solo and LPDDR2 interface schematic attached herewith for your reference.

Re: imx6solo and LPDDR2 Stress Testing

pengyong_zhang — Tue, 16 Jul 2024 07:06:55 GMT

Please use the following setting:

Re: imx6solo and LPDDR2 Stress Testing

deepaktajanpure — Tue, 16 Jul 2024 10:16:41 GMT

Thanks for your reply. Already done the changes you have mentioned, but still not working. Is there anything left?

Re: imx6solo and LPDDR2 Stress Testing

pengyong_zhang — Wed, 17 Jul 2024 01:50:18 GMT

please share your fail log file.

Re: imx6solo and LPDDR2 Stress Testing

deepaktajanpure — Wed, 17 Jul 2024 03:48:47 GMT

When we click on Calibration it is getting hang. Please see DDR Stress Tester snapshot and log file attached herewith

Re: imx6solo and LPDDR2 Stress Testing

pengyong_zhang — Thu, 18 Jul 2024 02:27:44 GMT

HI @deepaktajanpure

Please use the attachment test.

Re: imx6solo and LPDDR2 Stress Testing

deepaktajanpure — Thu, 18 Jul 2024 03:47:07 GMT

Hi, executed file sent by you, but still same problem. It is getting stucked in calibration. Please see the logs shown below

============================================
DDR Stress Test (3.0.0)
Build: Dec 14 2018, 14:12:28
NXP Semiconductors.
============================================

============================================
Chip ID
CHIP ID = i.MX6 Solo/DualLite (0x61)
Internal Revision = TO1.4
============================================

============================================
Boot Configuration
SRC_SBMR1(0x020d8004) = 0x00008000
SRC_SBMR2(0x020d801c) = 0x21000001
============================================

ARM Clock set to 1GHz

============================================
DDR configuration
BOOT_CFG3[5-4]: 0x00, Single DDR channel.
DDR type is LPDDR2 in 1-channel mode.
Data width: 32, bank num: 4
Row size: 13, col size: 9
No chip select is enabled
Density per chip select: 64MB
Density per channel: 64MB
============================================

Current Temperature: 49
============================================

DDR Freq: 396 MHz

Re: imx6solo and LPDDR2 Stress Testing

pengyong_zhang — Fri, 19 Jul 2024 07:32:08 GMT

hi, @deepaktajanpure

Please share your ddr tool setting windows.

Re: imx6solo and LPDDR2 Stress Testing

pengyong_zhang — Fri, 19 Jul 2024 07:47:51 GMT

hi @deepaktajanpure

Use the attachment file test again.

Re: imx6solo and LPDDR2 Stress Testing

deepaktajanpure — Fri, 19 Jul 2024 08:54:46 GMT

your excel sheet is for imx6sx. Excel sheet version is older v1.1, we are using 1.4. sheet is defined for different LPDDR part number (MT42L256M32D2) ours is MT42L16M32D1HE

Re: imx6solo and LPDDR2 Stress Testing

pengyong_zhang — Mon, 22 Jul 2024 02:04:18 GMT

hi @deepaktajanpure

Please choose the default setting of ARM Speed and the attachment file try.

B.R

Re: imx6solo and LPDDR2 Stress Testing

deepaktajanpure — Mon, 05 Aug 2024 08:16:06 GMT

Still calibration is failing. Please go through below logs and inc file attached herewith

============================================
        DDR Stress Test (2.4.0)
        Build: Mar 7 2016, 11:17:32
        Freescale Semiconductor, Inc.
============================================

============================================
Chip ID
CHIP ID = i.MX6 Solo/DualLite (0x61)
Internal Revision = TO1.4
============================================

============================================
Boot Configuration
SRC_SBMR1(0x020d8004) = 0x00008000
SRC_SBMR2(0x020d801c) = 0x21000001
============================================

ARM Clock set to 800MHz

============================================
DDR configuration
BOOT_CFG3[5-4]: 0x00, Single DDR channel.
DDR type is LPDDR2 in 1-channel mode.
Data width: 32, bank num: 4
Row size: 13, col size: 9
Chip select CSD0 is used
Density per chip select: 64MB
Density per channel: 64MB
============================================

Current Temperature: 35
============================================

DDR Freq: 297 MHz

Note: Array result[] holds the DRAM test result of each byte.
      0: test pass. 1: test fail
      4 bits respresent the result of 1 byte.
      result 0001:byte 0 fail.
      result 0011:byte 0, 1 fail.

Starting Read calibration...

ABS_OFFSET=0x00000000 result[00]=0x1111
ABS_OFFSET=0x04040404 result[01]=0x1111
ABS_OFFSET=0x08080808 result[02]=0x1111
ABS_OFFSET=0x0C0C0C0C result[03]=0x1111
ABS_OFFSET=0x10101010 result[04]=0x1111
ABS_OFFSET=0x14141414 result[05]=0x1111
ABS_OFFSET=0x18181818 result[06]=0x0010
ABS_OFFSET=0x1C1C1C1C result[07]=0x0010
ABS_OFFSET=0x20202020 result[08]=0x0010
ABS_OFFSET=0x24242424 result[09]=0x0010
ABS_OFFSET=0x28282828 result[0A]=0x0010
ABS_OFFSET=0x2C2C2C2C result[0B]=0x0010
ABS_OFFSET=0x30303030 result[0C]=0x0010
ABS_OFFSET=0x34343434 result[0D]=0x0010
ABS_OFFSET=0x38383838 result[0E]=0x0010
ABS_OFFSET=0x3C3C3C3C result[0F]=0x0010
ABS_OFFSET=0x40404040 result[10]=0x0010
ABS_OFFSET=0x44444444 result[11]=0x0010
ABS_OFFSET=0x48484848 result[12]=0x0010
ABS_OFFSET=0x4C4C4C4C result[13]=0x0010
ABS_OFFSET=0x50505050 result[14]=0x0010
ABS_OFFSET=0x54545454 result[15]=0x0010
ABS_OFFSET=0x58585858 result[16]=0x0010
ABS_OFFSET=0x5C5C5C5C result[17]=0x0010
ABS_OFFSET=0x60606060 result[18]=0x1010
ABS_OFFSET=0x64646464 result[19]=0x1111
ABS_OFFSET=0x68686868 result[1A]=0x1111
ABS_OFFSET=0x6C6C6C6C result[1B]=0x1111
ABS_OFFSET=0x70707070 result[1C]=0x1111
ABS_OFFSET=0x74747474 result[1D]=0x1111
ABS_OFFSET=0x78787878 result[1E]=0x1111
ABS_OFFSET=0x7C7C7C7C result[1F]=0x1111

Byte 0: (0x18 - 0x60), middle value:0x3c
ERROR FOUND, we can't get suitable value !!!!
dram test fails for all values.

Error: failed during ddr calibration

Re: imx6solo and LPDDR2 Stress Testing

pengyong_zhang — Tue, 06 Aug 2024 05:27:03 GMT

hi, @deepaktajanpure

PLease use the attachment file, And also check your PCB design if is folllowing the HDG file.

Re: imx6solo and LPDDR2 Stress Testing

deepaktajanpure — Tue, 06 Aug 2024 05:49:18 GMT

But you have not enabled any chip select in this script. Will you please check it again?

Re: imx6solo and LPDDR2 Stress Testing

pengyong_zhang — Tue, 06 Aug 2024 08:39:31 GMT

Hi, @deepaktajanpure

What so you mean not enabled any chip select? you can see the RPA file.