<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic use BBNSM RTC from U-Boot on i.MX 8ULP in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1910173#M226254</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I want to use BBNSM(Battery-Backed Non-Secure Module) RTC from U-Boot on i.MX 8ULP.&lt;/P&gt;&lt;P&gt;The smart way would be to use RPMsg, but it's not implemented in U-Boot.&lt;/P&gt;&lt;P&gt;However, I can't access the BBNSM register from the Arm Cortex A35. Is there an exclusive lock with the Arm Cortex-M33? Since the power_mode_switch is working on the M33, the BBNSM RTC is used.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;BBNSM is mapped to PBRIDGE0(Peripheral Bridge 0) on A35. I tried to see if I could use BBNSM with the A35.&lt;/P&gt;&lt;P&gt;I tried to read BBNSM_RTC_LS(BBNSM Real-Time Counter LS Register) but couldn't.&lt;/P&gt;&lt;P&gt;&amp;lt;pre&amp;gt;&lt;BR /&gt;=&amp;gt; md.l 0x28038040 1&lt;BR /&gt;"Synchronous Abort" handler, esr 0x96000210&lt;BR /&gt;elr: 000000008029b2a4 lr : 000000008029b1f4 (reloc)&lt;BR /&gt;elr: 00000000a5eef2a4 lr : 00000000a5eef1f4&lt;BR /&gt;x0 : 0000000000000009 x1 : 00000000fffffffe&lt;BR /&gt;x2 : 00000000a4e49458 x3 : 0000000000000020&lt;BR /&gt;x4 : 00000000ffffffff x5 : 00000000a4e491e8&lt;BR /&gt;x6 : 0000000000000030 x7 : 00000000a4e493a0&lt;BR /&gt;x8 : 0000000000000010 x9 : 0000000090a65063&lt;BR /&gt;x10: 00000000ffffffd8 x11: 0000000000000010&lt;BR /&gt;x12: 0000000000000006 x13: 000000000001869f&lt;BR /&gt;x14: 00000000a4e497c0 x15: 0000000000000021&lt;BR /&gt;x16: 00000000a5e6eb0c x17: 0000000000000000&lt;BR /&gt;x18: 00000000a4e51d40 x19: 0000000000000004&lt;BR /&gt;x20: 0000000000000004 x21: 0000000000000001&lt;BR /&gt;x22: 0000000028038040 x23: 00000000a4e49459&lt;BR /&gt;x24: 0000000000000000 x25: 00000000a4e49408&lt;BR /&gt;x26: 00000000a5f0ec2b x27: 0000000000000008&lt;BR /&gt;x28: 0000000000000004 x29: 00000000a4e493a0&lt;/P&gt;&lt;P&gt;Code: 2a0403f3 17ffffcb 7100129f 54000181 (b94002c3)&lt;BR /&gt;Resetting CPU ...&lt;/P&gt;&lt;P&gt;resetting ...&lt;BR /&gt;&amp;lt;/pre&amp;gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;PCC_BBNSM(PCC BBNSM Register) is 0xC0000000(PR=1, CGC=1), so it's&lt;BR /&gt;ready to use.&lt;/P&gt;&lt;P&gt;&amp;lt;pre&amp;gt;&lt;BR /&gt;=&amp;gt; md.l 0x280300e0 1 280300e0: c0000000 ....&lt;BR /&gt;&amp;lt;/pre&amp;gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I've also tried using a Linux kernel, but I'm unable to access it&lt;BR /&gt;either. The driver used was rtc-nxp-bbnsm.c below.&lt;/P&gt;&lt;P&gt;&lt;A href="https://lore.kernel.org/linux-arm-kernel/20230215024117.3357341-1-ping.bai@nxp.com/T/" target="_blank"&gt;https://lore.kernel.org/linux-arm-kernel/20230215024117.3357341-1-ping.bai@nxp.com/T/&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;mizo&lt;/P&gt;</description>
    <pubDate>Wed, 17 Jul 2024 02:07:37 GMT</pubDate>
    <dc:creator>DaisukeMizobuchi</dc:creator>
    <dc:date>2024-07-17T02:07:37Z</dc:date>
    <item>
      <title>use BBNSM RTC from U-Boot on i.MX 8ULP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1910173#M226254</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I want to use BBNSM(Battery-Backed Non-Secure Module) RTC from U-Boot on i.MX 8ULP.&lt;/P&gt;&lt;P&gt;The smart way would be to use RPMsg, but it's not implemented in U-Boot.&lt;/P&gt;&lt;P&gt;However, I can't access the BBNSM register from the Arm Cortex A35. Is there an exclusive lock with the Arm Cortex-M33? Since the power_mode_switch is working on the M33, the BBNSM RTC is used.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;BBNSM is mapped to PBRIDGE0(Peripheral Bridge 0) on A35. I tried to see if I could use BBNSM with the A35.&lt;/P&gt;&lt;P&gt;I tried to read BBNSM_RTC_LS(BBNSM Real-Time Counter LS Register) but couldn't.&lt;/P&gt;&lt;P&gt;&amp;lt;pre&amp;gt;&lt;BR /&gt;=&amp;gt; md.l 0x28038040 1&lt;BR /&gt;"Synchronous Abort" handler, esr 0x96000210&lt;BR /&gt;elr: 000000008029b2a4 lr : 000000008029b1f4 (reloc)&lt;BR /&gt;elr: 00000000a5eef2a4 lr : 00000000a5eef1f4&lt;BR /&gt;x0 : 0000000000000009 x1 : 00000000fffffffe&lt;BR /&gt;x2 : 00000000a4e49458 x3 : 0000000000000020&lt;BR /&gt;x4 : 00000000ffffffff x5 : 00000000a4e491e8&lt;BR /&gt;x6 : 0000000000000030 x7 : 00000000a4e493a0&lt;BR /&gt;x8 : 0000000000000010 x9 : 0000000090a65063&lt;BR /&gt;x10: 00000000ffffffd8 x11: 0000000000000010&lt;BR /&gt;x12: 0000000000000006 x13: 000000000001869f&lt;BR /&gt;x14: 00000000a4e497c0 x15: 0000000000000021&lt;BR /&gt;x16: 00000000a5e6eb0c x17: 0000000000000000&lt;BR /&gt;x18: 00000000a4e51d40 x19: 0000000000000004&lt;BR /&gt;x20: 0000000000000004 x21: 0000000000000001&lt;BR /&gt;x22: 0000000028038040 x23: 00000000a4e49459&lt;BR /&gt;x24: 0000000000000000 x25: 00000000a4e49408&lt;BR /&gt;x26: 00000000a5f0ec2b x27: 0000000000000008&lt;BR /&gt;x28: 0000000000000004 x29: 00000000a4e493a0&lt;/P&gt;&lt;P&gt;Code: 2a0403f3 17ffffcb 7100129f 54000181 (b94002c3)&lt;BR /&gt;Resetting CPU ...&lt;/P&gt;&lt;P&gt;resetting ...&lt;BR /&gt;&amp;lt;/pre&amp;gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;PCC_BBNSM(PCC BBNSM Register) is 0xC0000000(PR=1, CGC=1), so it's&lt;BR /&gt;ready to use.&lt;/P&gt;&lt;P&gt;&amp;lt;pre&amp;gt;&lt;BR /&gt;=&amp;gt; md.l 0x280300e0 1 280300e0: c0000000 ....&lt;BR /&gt;&amp;lt;/pre&amp;gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I've also tried using a Linux kernel, but I'm unable to access it&lt;BR /&gt;either. The driver used was rtc-nxp-bbnsm.c below.&lt;/P&gt;&lt;P&gt;&lt;A href="https://lore.kernel.org/linux-arm-kernel/20230215024117.3357341-1-ping.bai@nxp.com/T/" target="_blank"&gt;https://lore.kernel.org/linux-arm-kernel/20230215024117.3357341-1-ping.bai@nxp.com/T/&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;mizo&lt;/P&gt;</description>
      <pubDate>Wed, 17 Jul 2024 02:07:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1910173#M226254</guid>
      <dc:creator>DaisukeMizobuchi</dc:creator>
      <dc:date>2024-07-17T02:07:37Z</dc:date>
    </item>
    <item>
      <title>Re: use BBNSM RTC from U-Boot on i.MX 8ULP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1912831#M226419</link>
      <description>&lt;P&gt;Could you tell me which version of BSP are you using?&lt;/P&gt;</description>
      <pubDate>Sat, 20 Jul 2024 03:46:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1912831#M226419</guid>
      <dc:creator>jimmychan</dc:creator>
      <dc:date>2024-07-20T03:46:31Z</dc:date>
    </item>
    <item>
      <title>Re: use BBNSM RTC from U-Boot on i.MX 8ULP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1913485#M226426</link>
      <description>&lt;P&gt;&amp;lt;p&amp;gt;Thank you for reply!&amp;lt;/p&amp;gt;&lt;BR /&gt;&amp;lt;p&amp;gt;The BSP versions are as follows:&amp;lt;/p&amp;gt;&lt;BR /&gt;&amp;lt;ul&amp;gt;&lt;BR /&gt;&amp;lt;li&amp;gt;imx-optee-os: lf-6.1.22-2.0.0&amp;lt;/li&amp;gt;&lt;BR /&gt;&amp;lt;li&amp;gt;imx-atf: lf-6.1.22-2.0.0&amp;lt;/li&amp;gt;&lt;BR /&gt;&amp;lt;li&amp;gt;uboot-imx: lf-6.1.22-2.0.0&amp;lt;/li&amp;gt;&lt;BR /&gt;&amp;lt;li&amp;gt;linux-imx: lf-5.10.72-2.2.3&amp;lt;/li&amp;gt;&lt;BR /&gt;&amp;lt;/ul&amp;gt;&lt;BR /&gt;&amp;lt;p&amp;gt;Best regards,&amp;lt;br /&amp;gt;mizo&amp;lt;/p&amp;gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 21 Jul 2024 23:48:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1913485#M226426</guid>
      <dc:creator>DaisukeMizobuchi</dc:creator>
      <dc:date>2024-07-21T23:48:40Z</dc:date>
    </item>
    <item>
      <title>Re: use BBNSM RTC from U-Boot on i.MX 8ULP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1915806#M226541</link>
      <description>&lt;P&gt;Please add the following TRDC configuration to BOARD_SetTrdcGlobalConfig() in SDK : /boards/evkmimx8ulp/demo_apps/power_mode_switch/board.c. Then try to read 0x28038040 in uboot.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;PRE class="lia-code-sample  language-markup"&gt;&lt;CODE&gt;        mbcBlockConfig.memoryAccessControlSelect = TRDC_MBC_ACCESS_CONTROL_POLICY_ALL_INDEX;
        mbcBlockConfig.nseEnable                 = true; /* non secure state can access the block for cortex-A35 */
        mbcBlockConfig.mbcIdx                    = 2U;   /* MBC2 */
        mbcBlockConfig.domainIdx                 = 7U;   /* MBC2_DOM7 */
        mbcBlockConfig.slaveMemoryIdx            = 0U;   /* MBC2_DOM7_MEM0 */
        mbcBlockConfig.memoryBlockIdx            = 56U;  /* MBC2_DOM7_MEM0_BLK_CFG_W56 */
        TRDC_MbcSetMemoryBlockConfig(TRDC, &amp;amp;mbcBlockConfig);&lt;/CODE&gt;&lt;/PRE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For example, It can be added at line 401.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jimmychan_0-1721798486942.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/290039i414A062E460E128C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jimmychan_0-1721798486942.png" alt="jimmychan_0-1721798486942.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;jimmychan_0-1721798486942.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 24 Jul 2024 05:21:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1915806#M226541</guid>
      <dc:creator>jimmychan</dc:creator>
      <dc:date>2024-07-24T05:21:37Z</dc:date>
    </item>
    <item>
      <title>Re: use BBNSM RTC from U-Boot on i.MX 8ULP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1915828#M226543</link>
      <description>Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/1422"&gt;@jimmychan&lt;/a&gt;&lt;BR /&gt;&lt;BR /&gt;Thanks for response,&lt;BR /&gt;&lt;BR /&gt;I was able to use BBNSM RTC using the method I was taught!&lt;BR /&gt;&lt;BR /&gt;Thanks,&lt;BR /&gt;mizo&lt;BR /&gt;</description>
      <pubDate>Wed, 24 Jul 2024 06:15:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/use-BBNSM-RTC-from-U-Boot-on-i-MX-8ULP/m-p/1915828#M226543</guid>
      <dc:creator>DaisukeMizobuchi</dc:creator>
      <dc:date>2024-07-24T06:15:31Z</dc:date>
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  </channel>
</rss>

