<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: RS485 iMX93</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1896900#M225684</link>
    <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/229416"&gt;@LorenzoSpadaro&lt;/a&gt;!&lt;/P&gt;
&lt;P&gt;Thank you for contacting NXP Support!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You should configure the pins in devcie tree like the UART5 of your dts.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards!&lt;/P&gt;
&lt;P&gt;Chavira&lt;/P&gt;</description>
    <pubDate>Mon, 01 Jul 2024 21:43:49 GMT</pubDate>
    <dc:creator>Chavira</dc:creator>
    <dc:date>2024-07-01T21:43:49Z</dc:date>
    <item>
      <title>RS485 iMX93</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1896764#M225674</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am currently trying to set up an RS485 line using the lpuart2 and lpuart7. In my device tree i added the lines:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;&amp;amp;iomuxc {

	pinctrl_uart2: uart2grp {	// RS485_1
		fsl,pins = &amp;lt;
			MX93_PAD_UART2_RXD__LPUART2_RX		0x31e
			MX93_PAD_UART2_TXD__LPUART2_TX		0x31e
			MX93_PAD_SAI1_TXC__LPUART2_CTS_B   0x31e
	
		&amp;gt;;
	};


	pinctrl_uart7: uart7grp { // RS485_2
		fsl,pins = &amp;lt;
			MX93_PAD_GPIO_IO08__LPUART7_TX		0x31e	// TX
			MX93_PAD_GPIO_IO09__LPUART7_RX		0x31e	// RX
			MX93_PAD_GPIO_IO10__LPUART7_CTS_B       0x31e	// DE
		&amp;gt;;
	};

};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;for the pin control and these:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;&amp;amp;lpuart2 { // RS485_1 pin: p1-72[TX] p1-19[RX] p1-53[DE]
	fsl,uart-has-rtscts;
	rts-gpios = &amp;lt;&amp;amp;gpio1 12 GPIO_ACTIVE_HIGH&amp;gt;;
    linux,rs485-enabled-at-boot-time;  // rs485 abilitata fin da subito al boot
	rs485-rts-active-high;
	rs485-rts-delay = &amp;lt;1 1&amp;gt;;
};

&amp;amp;lpuart7 { // RS485_2 pin: p1-39[TX] p1-41[RX] p1-37[DE]
	uart-has-rtscts;
	rts-gpios = &amp;lt;&amp;amp;gpio2 7 GPIO_ACTIVE_HIGH&amp;gt;;
	linux,rs485-enabled-at-boot-time;  // rs485 abilitata fin da subito al boot
	rs485-rts-active-high;
	rs485-rts-delay = &amp;lt;1 1&amp;gt;;
};&lt;/LI-CODE&gt;&lt;P&gt;For the peripherals.&lt;/P&gt;&lt;P&gt;I am trying to test the RS485 with a python script. I am currently able to write, but I am not able to read; that is because&amp;nbsp;RTS pin always high. I haven't find a way to make the machine use in the correct way the RTS/CTS pin from the som.&lt;/P&gt;&lt;P&gt;I checked the compatible is the imx93.dtsi file and it seems that the corresponding driver [fsl_lpuart.c] never access the device tree. Instead i have seen that the driver [imx.c] load from device tree some settings about RS485. Is it possible that there are some correlations? Do you know how can i configure the device tree (or the python script in order to make things work?&lt;/P&gt;&lt;P&gt;I attach all the device tree used in the board and the python script used for test.&lt;/P&gt;&lt;P&gt;Thank you in advance&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Lorenzo&lt;/P&gt;</description>
      <pubDate>Mon, 01 Jul 2024 16:10:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1896764#M225674</guid>
      <dc:creator>LorenzoSpadaro</dc:creator>
      <dc:date>2024-07-01T16:10:06Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 iMX93</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1896900#M225684</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/229416"&gt;@LorenzoSpadaro&lt;/a&gt;!&lt;/P&gt;
&lt;P&gt;Thank you for contacting NXP Support!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You should configure the pins in devcie tree like the UART5 of your dts.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards!&lt;/P&gt;
&lt;P&gt;Chavira&lt;/P&gt;</description>
      <pubDate>Mon, 01 Jul 2024 21:43:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1896900#M225684</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2024-07-01T21:43:49Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 iMX93</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1897233#M225716</link>
      <description>&lt;P&gt;Which one?&lt;BR /&gt;This in the ucm-imx93.dts file:&lt;/P&gt;&lt;PRE&gt;	pinctrl_uart5: uart5grp { // RS232 pin: p1-67[TX] p2-71[RX]
		fsl,pins = &amp;lt;
			MX93_PAD_DAP_TDI__LPUART5_RX				0x31e
			MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX		0x31e
		&amp;gt;;
	};&lt;/PRE&gt;&lt;P&gt;Or this in the ucm-imx93-pinctrl.dtsi file:&lt;/P&gt;&lt;PRE&gt;pinctrl_uart5: uart5grp {
	fsl,pins = &amp;lt;
		MX93_PAD_GPIO_IO01__LPUART5_RX		0x31e
		MX93_PAD_GPIO_IO00__LPUART5_TX		0x31e
		MX93_PAD_GPIO_IO02__LPUART5_CTS_B	0x31e
		MX93_PAD_GPIO_IO03__LPUART5_RTS_B	0x31e
		MX93_PAD_GPIO_IO18__GPIO2_IO18		0x31e
	&amp;gt;;
};&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In case it is the first one, how the peripheral knows which is the pin to use for the DataEnable function of the RS485 tranceiver [THVD1420DR]?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 02 Jul 2024 07:09:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1897233#M225716</guid>
      <dc:creator>LorenzoSpadaro</dc:creator>
      <dc:date>2024-07-02T07:09:51Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 iMX93</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1897617#M225760</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/229416"&gt;@LorenzoSpadaro&lt;/a&gt;!&lt;/P&gt;
&lt;P&gt;Like the ucm-imx93-pinctrl.dtsi file:&lt;/P&gt;
&lt;PRE&gt;pinctrl_uart5: uart5grp {
	fsl,pins = &amp;lt;
		MX93_PAD_GPIO_IO01__LPUART5_RX		0x31e
		MX93_PAD_GPIO_IO00__LPUART5_TX		0x31e
		MX93_PAD_GPIO_IO02__LPUART5_CTS_B	0x31e
		MX93_PAD_GPIO_IO03__LPUART5_RTS_B	0x31e
		MX93_PAD_GPIO_IO18__GPIO2_IO18		0x31e
	&amp;gt;;
};&lt;/PRE&gt;
&lt;P&gt;&amp;nbsp;Best Regards!&lt;/P&gt;
&lt;P&gt;Chavira&lt;/P&gt;</description>
      <pubDate>Tue, 02 Jul 2024 15:45:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1897617#M225760</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2024-07-02T15:45:58Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 iMX93</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1898274#M225812</link>
      <description>&lt;P&gt;Hi Chavira,&lt;/P&gt;&lt;P&gt;your solution worked!&lt;/P&gt;&lt;P&gt;After some elaborations, i optimized it like this:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;pinctrl_uart2: uart2grp { // RS485_1 pin: p1-72[TX] p1-19[RX] p1-53[DE]
fsl,pins = &amp;lt;
MX93_PAD_UART2_RXD__LPUART2_RX 0x31e
MX93_PAD_UART2_TXD__LPUART2_TX 0x31e
MX93_PAD_SAI1_TXD0__LPUART2_RTS_B 0x31e

&amp;gt;;
};

pinctrl_uart7: uart7grp { // RS485_2 pin: p1-39[TX] p1-41[RX] p1-37[DE]
fsl,pins = &amp;lt;
MX93_PAD_GPIO_IO08__LPUART7_TX 0x31e // TX
MX93_PAD_GPIO_IO09__LPUART7_RX 0x31e // RX
MX93_PAD_GPIO_IO11__LPUART7_RTS_B   0x31e   // DE
&amp;gt;;
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;It is useless all this part that i had in my dtb (now erased):&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;&amp;amp;lpuart2 { // RS485_1 pin: p1-72[TX] p1-19[RX] p1-53[DE]
	fsl,uart-has-rtscts;
	rts-gpios = &amp;lt;&amp;amp;gpio1 12 GPIO_ACTIVE_HIGH&amp;gt;;
    linux,rs485-enabled-at-boot-time;  // rs485 abilitata fin da subito al boot
	rs485-rts-active-high;
	rs485-rts-delay = &amp;lt;1 1&amp;gt;;
};

&amp;amp;lpuart7 { // RS485_2 pin: p1-39[TX] p1-41[RX] p1-37[DE]
	uart-has-rtscts;
	rts-gpios = &amp;lt;&amp;amp;gpio2 7 GPIO_ACTIVE_HIGH&amp;gt;;
	linux,rs485-enabled-at-boot-time;  // rs485 abilitata fin da subito al boot
	rs485-rts-active-high;
	rs485-rts-delay = &amp;lt;1 1&amp;gt;;
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;This is because the compatible for the LPUART is different than the previous processors (imx6 and imx8), and none of these tags of the dtb are not used anymore.&lt;/P&gt;&lt;P&gt;Another important thing, in python3.10 is necesaary to initialize the peripheral like this:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="python"&gt;port = serial.Serial(port="/dev/ttyLP6", baudrate=19200, timeout=2, write_timeout=2)
port.rs485_mode = serial.rs485.RS485Settings()&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;So it is necessary to add the second line.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In this way the data enable is correctly used by the peripheral, like you see in this oscilloscope pic with tx[y], de[v] and rx[b]:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DS1Z_QuickPrint2.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/286856iC143B0FC7D092FB0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="DS1Z_QuickPrint2.png" alt="DS1Z_QuickPrint2.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;DS1Z_QuickPrint2.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;</description>
      <pubDate>Wed, 03 Jul 2024 09:57:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RS485-iMX93/m-p/1898274#M225812</guid>
      <dc:creator>LorenzoSpadaro</dc:creator>
      <dc:date>2024-07-03T09:57:57Z</dc:date>
    </item>
  </channel>
</rss>

