topic Re: IMX93 gpio pin register setup value in i.MX Processors

IMX93 gpio pin register setup value

AlanWen — Fri, 31 May 2024 06:01:37 GMT

Board: IMX93 EVK

I'm trying to port a pin as GPIO and setup the register value according to IMX93RM document,

but I didn't see any control bit definition about PUE (pull up/down)

where can I find the register value (red text) definition as the source code setup value as below ?

pinctrl_usdhc3_wlan: usdhc3wlangrp {
fsl,pins = <
MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x31e
>;
};

Re: IMX93 gpio pin register setup value

joanxie — Fri, 31 May 2024 07:42:34 GMT

pls refer to the SW_PAD_CTL_PAD_CCM_CLKO1

Re: IMX93 gpio pin register setup value

Sanjay_Pandey1 — Thu, 13 Jun 2024 17:19:40 GMT

This is bit confusing, actually there is two register.

SW_MUX_CTL_PAD_CCM_CLKO1 SW MUX Control Register (SW_MUX_CTL_PAD_CCM_CLKO1)
SW_PAD_CTL_PAD_CCM_CLKO1 SW PAD Control Register (SW_PAD_CTL_PAD_CCM_CLKO1)

SW_MUX_CTL_PAD_CCM_CLKO1 is used for selecting the function of the pin e.g. UART,GPIO,SPI,I2C , where as SW_PAD_CTL_PAD_CCM_CLKO1 is used to configure other properties of the pin for example Pull Up, Pull Down if the signal to pin is GPIO.

SW_PAD_CTL_PAD_CCM_CLKO1 is defined in .dts file where as SW_MUX_CTL_PAD_CCM_CLKO1 is already handed in imx93-pinfunc.h file, which is in same folder of dts.

#define MX93_PAD_CCM_CLKO1__CCMSRCGPCMIX_CLKO1 0x0088 0x0238 0x0000 0x0 0x0
#define MX93_PAD_CCM_CLKO1__FLEXIO1_FLEXIO26 0x0088 0x0238 0x0000 0x4 0x0
#define MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x0088 0x0238 0x0000 0x5 0x0

These three macro defines three alternate option bellow is the description of each value of the tuples.

/*
* The pin function ID is a tuple of
* <mux_reg conf_reg input_reg mux_mode input_val>
*/