<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX Processors中的主题 Re: Cache Operation</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Cache-Operation/m-p/1868968#M223948</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;For the cache-policies and cleaning you can check ARM:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://developer.arm.com/documentation/den0013/d/Caches/Invalidating-and-cleaning-cache-memory" target="_blank"&gt;https://developer.arm.com/documentation/den0013/d/Caches/Invalidating-and-cleaning-cache-memory&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://developer.arm.com/documentation/ka001150/latest/" target="_blank"&gt;https://developer.arm.com/documentation/ka001150/latest/&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
    <pubDate>Mon, 20 May 2024 14:54:10 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2024-05-20T14:54:10Z</dc:date>
    <item>
      <title>Cache Operation</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Cache-Operation/m-p/1868103#M223885</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm working on imx8ulp. I would like to ask:&lt;/P&gt;&lt;P&gt;1) how write-back policy cache working?&lt;/P&gt;&lt;P&gt;2) May I know how to demonstrate the usage of the cache clean &amp;amp; cache invalidate? Is there a way to test it?&lt;/P&gt;</description>
      <pubDate>Fri, 17 May 2024 13:55:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Cache-Operation/m-p/1868103#M223885</guid>
      <dc:creator>abdrhmn</dc:creator>
      <dc:date>2024-05-17T13:55:40Z</dc:date>
    </item>
    <item>
      <title>Re: Cache Operation</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Cache-Operation/m-p/1868968#M223948</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;For the cache-policies and cleaning you can check ARM:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://developer.arm.com/documentation/den0013/d/Caches/Invalidating-and-cleaning-cache-memory" target="_blank"&gt;https://developer.arm.com/documentation/den0013/d/Caches/Invalidating-and-cleaning-cache-memory&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://developer.arm.com/documentation/ka001150/latest/" target="_blank"&gt;https://developer.arm.com/documentation/ka001150/latest/&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Mon, 20 May 2024 14:54:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Cache-Operation/m-p/1868968#M223948</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2024-05-20T14:54:10Z</dc:date>
    </item>
  </channel>
</rss>

