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    <title>topic Re: Maximum LPSPI frequency in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Maximum-LPSPI-frequency/m-p/1863138#M223541</link>
    <description>&lt;P&gt;Hi Edwin, thanks for your reply.&lt;/P&gt;&lt;P&gt;What if I set the clock root to 120MHz, and a prescaler and/or divider equal to /4, such that I get 30MHz on the pins?&lt;/P&gt;&lt;P&gt;Would this be guaranteed to work?&lt;/P&gt;</description>
    <pubDate>Fri, 10 May 2024 06:47:53 GMT</pubDate>
    <dc:creator>stefano-quantic</dc:creator>
    <dc:date>2024-05-10T06:47:53Z</dc:date>
    <item>
      <title>Maximum LPSPI frequency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Maximum-LPSPI-frequency/m-p/1861288#M223451</link>
      <description>&lt;P&gt;I'm using iMXRT1176 and MCUXpresso IDE (v11.8.0 [Build 1165] [2023-07-26]).&lt;/P&gt;&lt;P&gt;The documentation is unclear about the maximum frequency for the LPSPI clock.&lt;BR /&gt;The datasheet ("IMXRT1170IEC", Rev. 5, 01/2024) has table 84, which states that the maximum Frequency of operation (fSCK) is fPERIPH/2, which is clear enough.&lt;BR /&gt;However, the datasheet never defines what fPERIPH is, nor does it give any range for it.&lt;BR /&gt;Also, table 84 has note 1, regarding fSCK, which says that "Absolute maximum frequency of operation (fop) is 30 MHz".&lt;BR /&gt;This seems to be saying that the LPSPI clock root must be &amp;lt;= 60MHz (so that fSCK &amp;lt;= 30MHz), unless I use a divider higher than the minimum one (/2).&lt;/P&gt;&lt;P&gt;However, Config Tools says that the limit for the clock root is 135MHz (so, fSCK &amp;lt;= 67.5MHz). This can be verified in Config Tools by setting a clock root frequency higher than that – an error like the following will be shown in the "Problems" view:&lt;BR /&gt;====&lt;BR /&gt;Issue: The output frequency must be lower than or equal to: 135 MHz&lt;BR /&gt;Level: Error&lt;BR /&gt;Type: Tool problem&lt;BR /&gt;Tool: Clocks&lt;BR /&gt;Origin: Clocks: BOARD_BootClockRUN&lt;BR /&gt;Resource: CCM.LPSPI1_CLK_ROOT&lt;BR /&gt;Information: The output frequency must be lower than or equal to: 135 MHz (See constraint 1)&lt;BR /&gt;====&lt;/P&gt;&lt;P&gt;The 135MHz limit doesn't appear anywhere in the datasheet.&lt;/P&gt;&lt;P&gt;What is the actual limit for the LPSPI clock?&lt;/P&gt;&lt;P&gt;Is it correct that the clock root can be as high as 135MHz, but that in this case I need a higher divider, so that fSCK is &amp;lt;= 30MHz anyway?&lt;/P&gt;&lt;P&gt;Also: Config Tools, in the "Peripherals" view, let me configure an LPSPI with a 132MHz clock root, and a baudrate of 66MHz (resulting in a /2 divider), without raising any errors.&lt;BR /&gt;The FSL library has no objections either: LPSPI_MasterInit(), which then calls LPSPI_MasterSetBaudRate(), accepts these parameters (132MHz source clock, 66MHz baudrate) without complaining.&lt;/P&gt;</description>
      <pubDate>Wed, 08 May 2024 09:07:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Maximum-LPSPI-frequency/m-p/1861288#M223451</guid>
      <dc:creator>stefano-quantic</dc:creator>
      <dc:date>2024-05-08T09:07:21Z</dc:date>
    </item>
    <item>
      <title>Re: Maximum LPSPI frequency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Maximum-LPSPI-frequency/m-p/1862794#M223526</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/219981"&gt;@stefano-quantic&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Even though the clock root for the LPSPI module supports higher frequencies, Note 1 of the datasheet sates that the module maximum frequency of operation for the fSCK is 30MHz, so the frequency for the peripheral (fperiph) must be &amp;lt;=60MHz for proper functionality of the module. In other words, setting the clock root to a higher frequency might result in unexpected behaviors for the LPSPI module, so the recommendation is to maintain fperiph to &amp;lt;=60MHz to ensure proper functionality of the peripheral.&lt;/P&gt;
&lt;P&gt;BR,&lt;BR /&gt;Edwin.&lt;/P&gt;</description>
      <pubDate>Thu, 09 May 2024 19:55:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Maximum-LPSPI-frequency/m-p/1862794#M223526</guid>
      <dc:creator>EdwinHz</dc:creator>
      <dc:date>2024-05-09T19:55:12Z</dc:date>
    </item>
    <item>
      <title>Re: Maximum LPSPI frequency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Maximum-LPSPI-frequency/m-p/1863138#M223541</link>
      <description>&lt;P&gt;Hi Edwin, thanks for your reply.&lt;/P&gt;&lt;P&gt;What if I set the clock root to 120MHz, and a prescaler and/or divider equal to /4, such that I get 30MHz on the pins?&lt;/P&gt;&lt;P&gt;Would this be guaranteed to work?&lt;/P&gt;</description>
      <pubDate>Fri, 10 May 2024 06:47:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Maximum-LPSPI-frequency/m-p/1863138#M223541</guid>
      <dc:creator>stefano-quantic</dc:creator>
      <dc:date>2024-05-10T06:47:53Z</dc:date>
    </item>
    <item>
      <title>Re: Maximum LPSPI frequency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Maximum-LPSPI-frequency/m-p/1864575#M223649</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/219981"&gt;@stefano-quantic&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;This should be OK. The restriction is based on the frequency of the SCK (fSCK), so as long as fSCK is &amp;lt;=30MHz, the module will work.&lt;/P&gt;&lt;P&gt;BR,&lt;BR /&gt;Edwin.&lt;/P&gt;</description>
      <pubDate>Mon, 13 May 2024 15:17:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Maximum-LPSPI-frequency/m-p/1864575#M223649</guid>
      <dc:creator>EdwinHz</dc:creator>
      <dc:date>2024-05-13T15:17:01Z</dc:date>
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