<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: IMX93-A55 and M33 started at the same time M core cannot control the GPIO</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1851189#M222799</link>
    <description>&lt;P&gt;&lt;SPAN&gt;The first test：using flash.bin（make by&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;make SOC=iMX9 flash_singleboot_m33&lt;/SPAN&gt;&lt;SPAN&gt;） to start both A and M cores，then&amp;nbsp;M core cannot control the GPIO（Test using M-core GPIO routine），However, other peripherals such as the SPI IIC work properly&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;--&amp;gt; The difference between test1 and test2&amp;amp;3 is that, test1 will load M33 firmware before loading A55 firmware. Please check your&amp;nbsp;&lt;SPAN&gt;M-core GPIO routine rules, the current&amp;nbsp;M-core GPIO routine you use may need load A55 firmware before M33 core.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 22 Apr 2024 05:44:31 GMT</pubDate>
    <dc:creator>Zhiming_Liu</dc:creator>
    <dc:date>2024-04-22T05:44:31Z</dc:date>
    <item>
      <title>IMX93-A55 and M33 started at the same time M core cannot control the GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1850298#M222730</link>
      <description>&lt;P&gt;A core SDK version ：6.1.55&lt;/P&gt;&lt;P&gt;M core SDK version：2.14&lt;/P&gt;&lt;P&gt;The first test：using flash.bin（make by &lt;SPAN&gt;make SOC=iMX9 flash_singleboot_m33&lt;/SPAN&gt;） to start both A and M cores，then&amp;nbsp;M core cannot control the GPIO（Test using M-core GPIO routine），However, other peripherals such as the SPI IIC work properly&lt;/P&gt;&lt;P&gt;The secord：using flash.bin（make by&amp;nbsp;&lt;SPAN&gt;make SOC=iMX9 flash_singleboot&lt;/SPAN&gt;） to start A cores，start M kernel using elf link file，then The M core can control GPIO normally&lt;/P&gt;&lt;P&gt;The third：In the uboot phase, load the firmware for gpio control (.bin format) to m33 and run m33 to control gpio normally&lt;/P&gt;&lt;P&gt;The above test methods are based on IMX93-EVK test，Do you have the general idea and solution of the positioning problem? Thank you&lt;/P&gt;&lt;P&gt;#IMX9352&lt;/P&gt;</description>
      <pubDate>Fri, 19 Apr 2024 02:07:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1850298#M222730</guid>
      <dc:creator>ChumingYang</dc:creator>
      <dc:date>2024-04-19T02:07:46Z</dc:date>
    </item>
    <item>
      <title>Re: IMX93-A55 and M33 started at the same time M core cannot control the GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1851189#M222799</link>
      <description>&lt;P&gt;&lt;SPAN&gt;The first test：using flash.bin（make by&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;make SOC=iMX9 flash_singleboot_m33&lt;/SPAN&gt;&lt;SPAN&gt;） to start both A and M cores，then&amp;nbsp;M core cannot control the GPIO（Test using M-core GPIO routine），However, other peripherals such as the SPI IIC work properly&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;--&amp;gt; The difference between test1 and test2&amp;amp;3 is that, test1 will load M33 firmware before loading A55 firmware. Please check your&amp;nbsp;&lt;SPAN&gt;M-core GPIO routine rules, the current&amp;nbsp;M-core GPIO routine you use may need load A55 firmware before M33 core.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 22 Apr 2024 05:44:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1851189#M222799</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2024-04-22T05:44:31Z</dc:date>
    </item>
    <item>
      <title>Re: IMX93-A55 and M33 started at the same time M core cannot control the GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1851208#M222802</link>
      <description>&lt;P&gt;I've confirmed your point by adding a 5 second delay to the M-core GPIO routine（before RGPIO_PININIT）&lt;/P&gt;&lt;P&gt;By reading the RM， I suspect that GPIO control in the M core is required after the initialization of the ATF security module in the A core is complete，Is this correct? If yes, what can be judged by ATF module initialization success&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 22 Apr 2024 06:03:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1851208#M222802</guid>
      <dc:creator>ChumingYang</dc:creator>
      <dc:date>2024-04-22T06:03:13Z</dc:date>
    </item>
    <item>
      <title>Re: IMX93-A55 and M33 started at the same time M core cannot control the GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1851241#M222803</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/228137"&gt;@ChumingYang&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You are correct.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Zhiming_Liu_0-1713766853157.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/274860i294CD5FEA45B4724/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Zhiming_Liu_0-1713766853157.png" alt="Zhiming_Liu_0-1713766853157.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;If yes, what can be judged by ATF module initialization success&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;--&amp;gt;You can try to read&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;GPIO_BASE + &lt;/SPAN&gt;&lt;SPAN&gt;0x10/&lt;/SPAN&gt;&lt;SPAN&gt;0x14/&lt;/SPAN&gt;&lt;SPAN&gt;0x18/&lt;/SPAN&gt;&lt;SPAN&gt;0x1c status.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 22 Apr 2024 06:29:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1851241#M222803</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2024-04-22T06:29:01Z</dc:date>
    </item>
    <item>
      <title>Re: IMX93-A55 and M33 started at the same time M core cannot control the GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1851368#M222808</link>
      <description>&lt;P&gt;Thank you very much. I will continue to test in this direction. In addition, I am also very interested in the following questions&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/How-to-extend-the-buffer-size-of-A55-in-iMX9352-when-using/m-p/1764431/emcs_t/S2h8ZW1haWx8dG9waWNfc3Vic2NyaXB0aW9ufExQSFBUTEFUVTRDVlZ8MTc2NDQzMXxTVUJTQ1JJUFRJT05TfGhL" target="_self"&gt;https://community.nxp.com/t5/i-MX-Processors/How-to-extend-the-buffer-size-of-A55-in-iMX9352-when-using/m-p/1764431/emcs_t/S2h8ZW1haWx8dG9waWNfc3Vic2NyaXB0aW9ufExQSFBUTEFUVTRDVlZ8MTc2NDQzMXxTVUJTQ1JJUFRJT05TfGhL&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 22 Apr 2024 06:57:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX93-A55-and-M33-started-at-the-same-time-M-core-cannot-control/m-p/1851368#M222808</guid>
      <dc:creator>ChumingYang</dc:creator>
      <dc:date>2024-04-22T06:57:20Z</dc:date>
    </item>
  </channel>
</rss>

