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    <title>i.MX ProcessorsのトピックRe: FPU crash (probably) using FreeRTOS on Cortex-M7 / IMX8MP</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/FPU-crash-probably-using-FreeRTOS-on-Cortex-M7-IMX8MP/m-p/1832158#M221533</link>
    <description>&lt;P&gt;Thanks for your reply&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/171173"&gt;@AldoG&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We got the flags from the NXP example.&lt;/P&gt;&lt;P&gt;Looking more into the compiler flags and reference manual, we came to the conclusion that we should use the compiler flag&amp;nbsp;&lt;SPAN&gt;-mfpu=fpv5-d16, since the IMX8MP has a Cortex-M7 with double precision. With that flag, all our target tests are working and math library calls etc works as expected.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;However, should it work with the single precision flag?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;With the single precision flag our FPU tests sometimes worked. Moving around the statements in the source code and/or adding debug code sometimes made it work. So it seems to be timing or code layout dependent.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;It would be great if you added FPU examples.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Björn&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 20 Mar 2024 15:40:13 GMT</pubDate>
    <dc:creator>BjornJ</dc:creator>
    <dc:date>2024-03-20T15:40:13Z</dc:date>
    <item>
      <title>FPU crash (probably) using FreeRTOS on Cortex-M7 / IMX8MP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/FPU-crash-probably-using-FreeRTOS-on-Cortex-M7-IMX8MP/m-p/1829527#M221346</link>
      <description>&lt;P&gt;We are using FreeRTOS on the Cortex-M7 in a IMX8MP.&lt;/P&gt;&lt;P&gt;It has worked fine for some time until we added math library calls. The math library will use the FPU. Now the M7 has started to crash.&lt;/P&gt;&lt;P&gt;We suspect that it is related to some interrupt handler messing up the math library call.&lt;/P&gt;&lt;P&gt;Reading on forums and source code, it looks like FPU support is available without any special setup in FreeRTOS (for Cortex-M7). Do we need to do something special to activate FPU support? Any other ideas of what might be wrong?&lt;/P&gt;&lt;P&gt;Environment:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;IMX8_CM7_SDK_VERSION&lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt;MCUX_2.15.000&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;FreeRTOS version&amp;nbsp;V10.5.1&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;IMX8MP&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Relevant compiler and link flags:&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN&gt;We are using&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;-mfloat-abi=hard&amp;nbsp;&lt;/SPAN&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;-mfpu=fpv5-sp-d16&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Thanks for your help,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Björn&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 15 Mar 2024 15:46:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/FPU-crash-probably-using-FreeRTOS-on-Cortex-M7-IMX8MP/m-p/1829527#M221346</guid>
      <dc:creator>BjornJ</dc:creator>
      <dc:date>2024-03-15T15:46:59Z</dc:date>
    </item>
    <item>
      <title>Re: FPU crash (probably) using FreeRTOS on Cortex-M7 / IMX8MP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/FPU-crash-probably-using-FreeRTOS-on-Cortex-M7-IMX8MP/m-p/1831437#M221488</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;I see no problem with the link flags you have used, even in the SDK FreeRTOS we have the same flags set by default, please have a look at any example code flags.cmake&lt;BR /&gt;&lt;BR /&gt;IF(NOT DEFINED FPU)&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; SET(FPU "-mfloat-abi=hard -mfpu=fpv5-sp-d16")&amp;nbsp;&lt;BR /&gt;ENDIF()&lt;BR /&gt;&lt;BR /&gt;Unfortunately we do not have any samples using FPU, not that I'm aware off.&lt;BR /&gt;&lt;BR /&gt;Best regards/Saludos,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Tue, 19 Mar 2024 20:37:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/FPU-crash-probably-using-FreeRTOS-on-Cortex-M7-IMX8MP/m-p/1831437#M221488</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2024-03-19T20:37:48Z</dc:date>
    </item>
    <item>
      <title>Re: FPU crash (probably) using FreeRTOS on Cortex-M7 / IMX8MP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/FPU-crash-probably-using-FreeRTOS-on-Cortex-M7-IMX8MP/m-p/1832158#M221533</link>
      <description>&lt;P&gt;Thanks for your reply&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/171173"&gt;@AldoG&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We got the flags from the NXP example.&lt;/P&gt;&lt;P&gt;Looking more into the compiler flags and reference manual, we came to the conclusion that we should use the compiler flag&amp;nbsp;&lt;SPAN&gt;-mfpu=fpv5-d16, since the IMX8MP has a Cortex-M7 with double precision. With that flag, all our target tests are working and math library calls etc works as expected.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;However, should it work with the single precision flag?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;With the single precision flag our FPU tests sometimes worked. Moving around the statements in the source code and/or adding debug code sometimes made it work. So it seems to be timing or code layout dependent.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;It would be great if you added FPU examples.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Björn&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Mar 2024 15:40:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/FPU-crash-probably-using-FreeRTOS-on-Cortex-M7-IMX8MP/m-p/1832158#M221533</guid>
      <dc:creator>BjornJ</dc:creator>
      <dc:date>2024-03-20T15:40:13Z</dc:date>
    </item>
    <item>
      <title>Re: FPU crash (probably) using FreeRTOS on Cortex-M7 / IMX8MP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/FPU-crash-probably-using-FreeRTOS-on-Cortex-M7-IMX8MP/m-p/1833187#M221621</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;According to reference manual both are supported, so I would say it deppends on the application.&lt;BR /&gt;&lt;BR /&gt;Regarding FPU example, I will pass your comments to team.&lt;BR /&gt;&lt;BR /&gt;Best regards/Saludos,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Thu, 21 Mar 2024 20:02:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/FPU-crash-probably-using-FreeRTOS-on-Cortex-M7-IMX8MP/m-p/1833187#M221621</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2024-03-21T20:02:07Z</dc:date>
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