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  <channel>
    <title>i.MX ProcessorsのトピックRe: PCIe RP Controller VS PCIe EP Controller</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-RP-Controller-VS-PCIe-EP-Controller/m-p/1830909#M221445</link>
    <description>&lt;P&gt;Dear&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231098"&gt;@shivam_jksel&lt;/a&gt;&amp;nbsp;.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;gt;&amp;gt; Q2:&lt;/P&gt;
&lt;P&gt;RC driver &amp;amp; EP roles are both supported in&amp;nbsp;pci-imx6.c&lt;/P&gt;
&lt;TABLE border="1" width="100%"&gt;
&lt;TBODY&gt;
&lt;TR&gt;
&lt;TD width="100%"&gt;static const struct of_device_id imx6_pcie_of_match[] = {&lt;BR /&gt;{ .compatible = "fsl,imx6q-pcie", .data = &amp;amp;drvdata[IMX6Q], },&lt;BR /&gt;{ .compatible = "fsl,imx6q-pcie-ep", .data = &amp;amp;drvdata[IMX6Q_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx6sx-pcie", .data = &amp;amp;drvdata[IMX6SX], },&lt;BR /&gt;{ .compatible = "fsl,imx6sx-pcie-ep", .data = &amp;amp;drvdata[IMX6SX_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx6qp-pcie", .data = &amp;amp;drvdata[IMX6QP], },&lt;BR /&gt;{ .compatible = "fsl,imx6qp-pcie-ep", .data = &amp;amp;drvdata[IMX6QP_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx7d-pcie", .data = &amp;amp;drvdata[IMX7D], },&lt;BR /&gt;{ .compatible = "fsl,imx7d-pcie-ep", .data = &amp;amp;drvdata[IMX7D_EP], },&lt;BR /&gt;&lt;STRONG&gt;{ .compatible = "fsl,imx8mq-pcie", .data = &amp;amp;drvdata[IMX8MQ], },&lt;/STRONG&gt;&lt;BR /&gt;&lt;EM&gt;&lt;FONT color="#0000FF"&gt;&lt;STRONG&gt;{ .compatible = "fsl,imx8mq-pcie-ep", .data = &amp;amp;drvdata[IMX8MQ_EP], },&lt;/STRONG&gt;&lt;/FONT&gt;&lt;/EM&gt;&lt;BR /&gt;{ .compatible = "fsl,imx8mm-pcie", .data = &amp;amp;drvdata[IMX8MM], },&lt;BR /&gt;{ .compatible = "fsl,imx8mm-pcie-ep", .data = &amp;amp;drvdata[IMX8MM_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx8mp-pcie", .data = &amp;amp;drvdata[IMX8MP], },&lt;BR /&gt;{ .compatible = "fsl,imx8mp-pcie-ep", .data = &amp;amp;drvdata[IMX8MP_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx8qm-pcie", .data = &amp;amp;drvdata[IMX8QM], },&lt;BR /&gt;{ .compatible = "fsl,imx8qm-pcie-ep", .data = &amp;amp;drvdata[IMX8QM_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx8qxp-pcie", .data = &amp;amp;drvdata[IMX8QXP], },&lt;BR /&gt;{ .compatible = "fsl,imx8qxp-pcie-ep", .data = &amp;amp;drvdata[IMX8QXP_EP], },&lt;BR /&gt;{},&lt;BR /&gt;};&lt;/TD&gt;
&lt;/TR&gt;
&lt;/TBODY&gt;
&lt;/TABLE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Q3:&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Different dts .&lt;/P&gt;
&lt;P&gt;-imx8mq-evk.dts, pcie &lt;STRONG&gt;RC&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;-imx8mq-evk-pci-ep.dts, &lt;STRONG&gt;EP&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks!&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;weidong&lt;/P&gt;</description>
    <pubDate>Tue, 19 Mar 2024 07:28:57 GMT</pubDate>
    <dc:creator>weidong_sun</dc:creator>
    <dc:date>2024-03-19T07:28:57Z</dc:date>
    <item>
      <title>PCIe RP Controller VS PCIe EP Controller</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-RP-Controller-VS-PCIe-EP-Controller/m-p/1830381#M221419</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;&lt;BR /&gt;1) can you guide me to the file/code in linux kernel for the PCIe RP controller driver and also for PCIe EP controller driver?&lt;BR /&gt;&lt;BR /&gt;2)&amp;nbsp; how does a RC Controller driver differs from the EP controller driver?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;3) what are the role/responsibility/functions of a RC and EP controllers?&lt;BR /&gt;&lt;BR /&gt;I want to buy two IMX boards which can act as PCI HOST and PCIe&amp;nbsp; EP, please suggest which boards will be fine . my use case is just to test out the complete basic PCIe end to end and how the EP RC talk to each other.&lt;/P&gt;</description>
      <pubDate>Mon, 18 Mar 2024 14:39:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCIe-RP-Controller-VS-PCIe-EP-Controller/m-p/1830381#M221419</guid>
      <dc:creator>shivam_jksel</dc:creator>
      <dc:date>2024-03-18T14:39:43Z</dc:date>
    </item>
    <item>
      <title>Re: PCIe RP Controller VS PCIe EP Controller</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-RP-Controller-VS-PCIe-EP-Controller/m-p/1830685#M221436</link>
      <description>&lt;P&gt;Dear&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231098"&gt;@shivam_jksel&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;1. About EVK boards.&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;--i.MX8MQ-EVK &amp;amp; i.MX8MM-EVK support PCIe GEN2, PCIe signals are connected to M.2 KEY E connector.&lt;/P&gt;
&lt;P&gt;--i.MX8MP-EVK supports PCIe GEN3, also users can get PCIe signals on M.2 KEY E connectot.&lt;/P&gt;
&lt;P&gt;you can evaluate above 3 boards.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;2. About driver in linux kernel&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;Default configurations of Kernel have supported RC &amp;amp; EP driver.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="weidong_sun_0-1710819959714.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/269068iAEE3D2D2B6A671D2/image-size/medium?v=v2&amp;amp;px=400" role="button" title="weidong_sun_0-1710819959714.png" alt="weidong_sun_0-1710819959714.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;3. device tree&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;For EP role,&amp;nbsp; the dts for EP has been ready in device tree, on EP side, you should use it.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="weidong_sun_1-1710820204335.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/269069i5833A56014BB56AA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="weidong_sun_1-1710820204335.png" alt="weidong_sun_1-1710820204335.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks!&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;weidong&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 19 Mar 2024 03:50:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCIe-RP-Controller-VS-PCIe-EP-Controller/m-p/1830685#M221436</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2024-03-19T03:50:33Z</dc:date>
    </item>
    <item>
      <title>Re: PCIe RP Controller VS PCIe EP Controller</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-RP-Controller-VS-PCIe-EP-Controller/m-p/1830732#M221438</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/26366"&gt;@weidong_sun&lt;/a&gt;&lt;BR /&gt;&lt;BR /&gt;1)&lt;BR /&gt;&amp;nbsp;thanks for the name of the boards.&lt;BR /&gt;&lt;BR /&gt;2)&lt;BR /&gt;the RC EP controller file structure in kernel is this, correct me if i am wrong:&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;pci_subsytem &amp;lt;--&amp;gt; pcie_designware_host.c &amp;lt;--&amp;gt; pci_imx6.c &amp;lt;---&amp;gt; ROOT PORT CONTROLLER&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;pci_subsytem &amp;lt;--&amp;gt; pcie_designware_ep.c &amp;lt;--&amp;gt; pci_imx6.c &amp;lt;---&amp;gt; END POINT CONTROLLER&lt;BR /&gt;&lt;BR /&gt;3)&amp;nbsp;&lt;BR /&gt;device tree for RC is different or same?&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;Regards,&lt;/P&gt;</description>
      <pubDate>Tue, 19 Mar 2024 05:38:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCIe-RP-Controller-VS-PCIe-EP-Controller/m-p/1830732#M221438</guid>
      <dc:creator>shivam_jksel</dc:creator>
      <dc:date>2024-03-19T05:38:34Z</dc:date>
    </item>
    <item>
      <title>Re: PCIe RP Controller VS PCIe EP Controller</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PCIe-RP-Controller-VS-PCIe-EP-Controller/m-p/1830909#M221445</link>
      <description>&lt;P&gt;Dear&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231098"&gt;@shivam_jksel&lt;/a&gt;&amp;nbsp;.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;gt;&amp;gt; Q2:&lt;/P&gt;
&lt;P&gt;RC driver &amp;amp; EP roles are both supported in&amp;nbsp;pci-imx6.c&lt;/P&gt;
&lt;TABLE border="1" width="100%"&gt;
&lt;TBODY&gt;
&lt;TR&gt;
&lt;TD width="100%"&gt;static const struct of_device_id imx6_pcie_of_match[] = {&lt;BR /&gt;{ .compatible = "fsl,imx6q-pcie", .data = &amp;amp;drvdata[IMX6Q], },&lt;BR /&gt;{ .compatible = "fsl,imx6q-pcie-ep", .data = &amp;amp;drvdata[IMX6Q_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx6sx-pcie", .data = &amp;amp;drvdata[IMX6SX], },&lt;BR /&gt;{ .compatible = "fsl,imx6sx-pcie-ep", .data = &amp;amp;drvdata[IMX6SX_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx6qp-pcie", .data = &amp;amp;drvdata[IMX6QP], },&lt;BR /&gt;{ .compatible = "fsl,imx6qp-pcie-ep", .data = &amp;amp;drvdata[IMX6QP_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx7d-pcie", .data = &amp;amp;drvdata[IMX7D], },&lt;BR /&gt;{ .compatible = "fsl,imx7d-pcie-ep", .data = &amp;amp;drvdata[IMX7D_EP], },&lt;BR /&gt;&lt;STRONG&gt;{ .compatible = "fsl,imx8mq-pcie", .data = &amp;amp;drvdata[IMX8MQ], },&lt;/STRONG&gt;&lt;BR /&gt;&lt;EM&gt;&lt;FONT color="#0000FF"&gt;&lt;STRONG&gt;{ .compatible = "fsl,imx8mq-pcie-ep", .data = &amp;amp;drvdata[IMX8MQ_EP], },&lt;/STRONG&gt;&lt;/FONT&gt;&lt;/EM&gt;&lt;BR /&gt;{ .compatible = "fsl,imx8mm-pcie", .data = &amp;amp;drvdata[IMX8MM], },&lt;BR /&gt;{ .compatible = "fsl,imx8mm-pcie-ep", .data = &amp;amp;drvdata[IMX8MM_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx8mp-pcie", .data = &amp;amp;drvdata[IMX8MP], },&lt;BR /&gt;{ .compatible = "fsl,imx8mp-pcie-ep", .data = &amp;amp;drvdata[IMX8MP_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx8qm-pcie", .data = &amp;amp;drvdata[IMX8QM], },&lt;BR /&gt;{ .compatible = "fsl,imx8qm-pcie-ep", .data = &amp;amp;drvdata[IMX8QM_EP], },&lt;BR /&gt;{ .compatible = "fsl,imx8qxp-pcie", .data = &amp;amp;drvdata[IMX8QXP], },&lt;BR /&gt;{ .compatible = "fsl,imx8qxp-pcie-ep", .data = &amp;amp;drvdata[IMX8QXP_EP], },&lt;BR /&gt;{},&lt;BR /&gt;};&lt;/TD&gt;
&lt;/TR&gt;
&lt;/TBODY&gt;
&lt;/TABLE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Q3:&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Different dts .&lt;/P&gt;
&lt;P&gt;-imx8mq-evk.dts, pcie &lt;STRONG&gt;RC&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;-imx8mq-evk-pci-ep.dts, &lt;STRONG&gt;EP&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks!&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;weidong&lt;/P&gt;</description>
      <pubDate>Tue, 19 Mar 2024 07:28:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PCIe-RP-Controller-VS-PCIe-EP-Controller/m-p/1830909#M221445</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2024-03-19T07:28:57Z</dc:date>
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