topic IMX8MP I2C Linux Device tree pinctrl question in i.MX Processors

IMX8MP I2C Linux Device tree pinctrl question

flobro — Fri, 15 Mar 2024 11:36:55 GMT

I have a I2C pinctrl setting in the device tree that I am trying to understand...

pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2
MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2
>;
};

What is the 0x4000 part in the 0x40001c2 pad setting? The SW_PAD_CTL register only supports 9 bits, so the 0x01c2 part makes sense...

I can't find where the extra 0x4000 is applied.

Thanks

Re: IMX8MP I2C Linux Device tree pinctrl question

Manuel_Salas — Fri, 15 Mar 2024 18:53:05 GMT

Hello @flobro

If you are using Config tools to configure de IOMUX, you will see the 0x4000 belong to "Software Input On Field.

If enabled:

If disabled:

I hope this can helps to you.

Best regards.

Salas.

Re: IMX8MP I2C Linux Device tree pinctrl question

flobro — Fri, 15 Mar 2024 19:21:34 GMT

"SION" was the keyword that finally led to documentation. Im the IMX8MP App Ref Manual "8.2.2.3 SW Loopback through SION bit" and

"17.1.3 External Signals" -- "Inputs of I2Cn_SCL and I2Cn_SDA also need to be manually enabled by setting the
SION bit in the IOMUX after the corresponding PADs are selected as I2C function."

(I am not familiar with "config tools", guess I am old school. But I will look it up.)

Thanks for the clue.

Re: IMX8MP I2C Linux Device tree pinctrl question

asmyth — Tue, 14 Jan 2025 01:51:32 GMT

I think this is a poor answer to the question. OP is asking for the reasoning behind the "0x4000" being applied.

This answer is much better, but took me longer to find: https://community.nxp.com/t5/i-MX-Processors/Device-tree-pinctrl-32-bit-or-16-bit/m-p/848643/highlight/true#M129897

In short, Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt from the linux-imx repo describes

Bits used for CONFIG:
NO_PAD_CTL(1 << 31): indicate this pin does not need config.
SION(1 << 30): Software Input On Field.
Force the selected mux mode input path no matter of MUX_MODE functionality.
By default the input path is determined by functionality of the selected
mux mode (regular).
Other bits are used for PAD setting.
Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part
of bits definitions.

So the reason for the 0x4000 is because SION is set (1<<30). Bits 31 and 30 are used for NO_PAD_CTL and SION respectively, while the other bits are taken directly from the SW_PAD_CTL register that OP was familiar with.