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    <title>topic Harpoon &amp;amp; eMMC in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Harpoon-amp-eMMC/m-p/1828265#M221258</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am currently evaluating the HARPOON technology on iMX8MN (evaluation) and IMX93(possible target).&lt;/P&gt;&lt;P&gt;It seems that Linux in HARPOON mode cannot use eMMC (see Known issues HRPN-245 in the HARPOON user guide). This is a problem because it is fine to use SD card for evaluation, but not for our products.&lt;/P&gt;&lt;P&gt;What is the reason, and is it planned to fix this issue?&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;François Lion&lt;/P&gt;</description>
    <pubDate>Thu, 14 Mar 2024 09:00:39 GMT</pubDate>
    <dc:creator>francoislion</dc:creator>
    <dc:date>2024-03-14T09:00:39Z</dc:date>
    <item>
      <title>Harpoon &amp; eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Harpoon-amp-eMMC/m-p/1828265#M221258</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am currently evaluating the HARPOON technology on iMX8MN (evaluation) and IMX93(possible target).&lt;/P&gt;&lt;P&gt;It seems that Linux in HARPOON mode cannot use eMMC (see Known issues HRPN-245 in the HARPOON user guide). This is a problem because it is fine to use SD card for evaluation, but not for our products.&lt;/P&gt;&lt;P&gt;What is the reason, and is it planned to fix this issue?&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;François Lion&lt;/P&gt;</description>
      <pubDate>Thu, 14 Mar 2024 09:00:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Harpoon-amp-eMMC/m-p/1828265#M221258</guid>
      <dc:creator>francoislion</dc:creator>
      <dc:date>2024-03-14T09:00:39Z</dc:date>
    </item>
    <item>
      <title>Re: Harpoon &amp; eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Harpoon-amp-eMMC/m-p/1831520#M221494</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;This is because the 2nd OS uses the pins for the eMMC (SDHC3 on device tree).&lt;BR /&gt;I do not think this may be an issue that could not be fixed, but unfortunately for the EVK it may not.&lt;BR /&gt;&lt;BR /&gt;Best regards/Saludos,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Wed, 20 Mar 2024 00:06:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Harpoon-amp-eMMC/m-p/1831520#M221494</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2024-03-20T00:06:46Z</dc:date>
    </item>
    <item>
      <title>Re: Harpoon &amp; eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Harpoon-amp-eMMC/m-p/1835324#M221796</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Thank you for the answer. I am happy to hear that it should be easy to fix...&lt;/P&gt;&lt;P&gt;Still, I don't get what you mean by "the 2nd OS uses the pins for the eMMC", I probably should have to look in details at the real time sample source code.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;François Lion&lt;/P&gt;</description>
      <pubDate>Tue, 26 Mar 2024 09:22:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Harpoon-amp-eMMC/m-p/1835324#M221796</guid>
      <dc:creator>francoislion</dc:creator>
      <dc:date>2024-03-26T09:22:40Z</dc:date>
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