<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: Use GPIO Pins as RTS and CTS for UART</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Use-GPIO-Pins-as-RTS-and-CTS-for-UART/m-p/1824699#M221011</link>
    <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/198858"&gt;@Aakash_Sharma&lt;/a&gt;&amp;nbsp;Were you able to find the answer to the above query? I am looking for a similar configuration for IMX8MP processor.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Anyone?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 11 Mar 2024 03:03:00 GMT</pubDate>
    <dc:creator>mahesh_hns</dc:creator>
    <dc:date>2024-03-11T03:03:00Z</dc:date>
    <item>
      <title>Use GPIO Pins as RTS and CTS for UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Use-GPIO-Pins-as-RTS-and-CTS-for-UART/m-p/1436268#M188788</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;We are using IMX8MQ based custom board on which we want to communicate with external BT device on UART3 of IMX with RTS-CTS functionality. We have configured UART3 RX and TX pins as usual but for RTS and CTS we are using GPIO1's IO6 and IO7 pins respectively. But unable to do communication. Below are the dts changes done for the the above mentioned functionality.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;amp;uart3 { /* BT */&lt;BR /&gt;pinctrl-names = "default";&lt;BR /&gt;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_uart3&amp;gt;;&lt;BR /&gt;assigned-clocks = &amp;lt;&amp;amp;clk IMX8MQ_CLK_UART3&amp;gt;;&lt;BR /&gt;assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MQ_SYS1_PLL_80M&amp;gt;;&lt;BR /&gt;rts-gpios = &amp;lt;&amp;amp;gpio1 6 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt;cts-gpios = &amp;lt;&amp;amp;gpio1 7 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt;fsl,uart-has-rtscts;&lt;BR /&gt;// resets = &amp;lt;&amp;amp;modem_reset&amp;gt;;&lt;BR /&gt;status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;pinctrl_uart3: uart3grp {&lt;BR /&gt;fsl,pins = &amp;lt;&lt;BR /&gt;MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49&lt;BR /&gt;MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49&lt;BR /&gt;MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x69&lt;BR /&gt;MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x69&lt;BR /&gt;&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;Please Suggest if anything is missing? or we can't use GPIO as RTS and CTS for UART3 on IMX8MQ.&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;</description>
      <pubDate>Thu, 31 Mar 2022 05:01:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Use-GPIO-Pins-as-RTS-and-CTS-for-UART/m-p/1436268#M188788</guid>
      <dc:creator>Aakash_Sharma</dc:creator>
      <dc:date>2022-03-31T05:01:19Z</dc:date>
    </item>
    <item>
      <title>Re: Use GPIO Pins as RTS and CTS for UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Use-GPIO-Pins-as-RTS-and-CTS-for-UART/m-p/1824699#M221011</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/198858"&gt;@Aakash_Sharma&lt;/a&gt;&amp;nbsp;Were you able to find the answer to the above query? I am looking for a similar configuration for IMX8MP processor.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Anyone?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 11 Mar 2024 03:03:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Use-GPIO-Pins-as-RTS-and-CTS-for-UART/m-p/1824699#M221011</guid>
      <dc:creator>mahesh_hns</dc:creator>
      <dc:date>2024-03-11T03:03:00Z</dc:date>
    </item>
    <item>
      <title>Re: Use GPIO Pins as RTS and CTS for UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Use-GPIO-Pins-as-RTS-and-CTS-for-UART/m-p/1965646#M229200</link>
      <description>&lt;P&gt;Hi ,&lt;BR /&gt;could you get the working case , im also looking for the configuration form imx8mp&lt;/P&gt;</description>
      <pubDate>Wed, 02 Oct 2024 12:20:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Use-GPIO-Pins-as-RTS-and-CTS-for-UART/m-p/1965646#M229200</guid>
      <dc:creator>A_M01</dc:creator>
      <dc:date>2024-10-02T12:20:59Z</dc:date>
    </item>
    <item>
      <title>Re: Use GPIO Pins as RTS and CTS for UART</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Use-GPIO-Pins-as-RTS-and-CTS-for-UART/m-p/1966073#M229231</link>
      <description>&lt;P&gt;If you read the binding guide, you will find the conflict issue in your device tree.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/nxp-imx/linux-imx/blob/rel_imx_4.14.98_2.2.0/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt" target="_blank"&gt;https://github.com/nxp-imx/linux-imx/blob/rel_imx_4.14.98_2.2.0/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt&lt;/A&gt;&lt;/P&gt;&lt;DIV&gt;* Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Required properties:&lt;/DIV&gt;&lt;DIV&gt;- compatible : Should be "fsl,&amp;lt;soc&amp;gt;-uart"&lt;/DIV&gt;&lt;DIV&gt;- reg : Address and length of the register set for the device&lt;/DIV&gt;&lt;DIV&gt;- interrupts : Should contain uart interrupt&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Optional properties:&lt;/DIV&gt;&lt;DIV&gt;- fsl,irda-mode : Indicate the uart supports irda mode&lt;/DIV&gt;&lt;DIV&gt;- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; in DCE mode by default.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT color="#000000"&gt;&lt;STRONG&gt;Please check Documentation/devicetree/bindings/serial/serial.txt&lt;/STRONG&gt;&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;for the complete list of generic properties.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Note: Each uart controller should have an alias correctly numbered&lt;/DIV&gt;&lt;DIV&gt;in "aliases" node.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Example:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;aliases {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;serial0 = &amp;amp;uart1;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;uart1: serial@73fbc000 {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;compatible = "fsl,imx51-uart", "fsl,imx21-uart";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reg = &amp;lt;0x73fbc000 0x4000&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;interrupts = &amp;lt;31&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT face="arial black,avant garde"&gt;&lt;SPAN&gt;uart-has-rtscts;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;fsl,dte-mode;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;A href="https://github.com/nxp-imx/linux-imx/blob/rel_imx_4.14.98_2.2.0/Documentation/devicetree/bindings/serial/serial.txt" target="_blank"&gt;https://github.com/nxp-imx/linux-imx/blob/rel_imx_4.14.98_2.2.0/Documentation/devicetree/bindings/serial/serial.txt&lt;/A&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;- uart-has-rtscts: The presence of this property indicates that the&lt;BR /&gt;UART has dedicated lines for RTS/CTS hardware flow control, and that&lt;BR /&gt;they are available for use (wired and enabled by pinmux configuration).&lt;BR /&gt;This depends on both the UART hardware and the board wiring.&lt;BR /&gt;Note that this property is mutually-exclusive with "cts-gpios" and&lt;BR /&gt;"rts-gpios" above, unless support is provided to switch between modes&lt;BR /&gt;dynamically.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;</description>
      <pubDate>Thu, 03 Oct 2024 04:22:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Use-GPIO-Pins-as-RTS-and-CTS-for-UART/m-p/1966073#M229231</guid>
      <dc:creator>roke</dc:creator>
      <dc:date>2024-10-03T04:22:51Z</dc:date>
    </item>
  </channel>
</rss>

