i.MX ProcessorsのトピックRe: I.MX6 PCIe power-on initialization sequence

I.MX6 PCIe power-on initialization sequence

jiandong1 — Thu, 29 Feb 2024 01:59:30 GMT

Hi，NXP:

We have measured the PCIe power-on initialization sequence of EVK（FW version：LF_v5.15.32-2.0.0_images_IMX6QPDLSOLOX），PCIE_RESET active before PCIE_CLK about 1ms，details as attachment；

According to the PCIe design specification，when PCIE_CLK is stable，PCIE_RESET just active ，now PCIE_RESET active before PCIE_CLK，so I want you to clarify the issue，thanks for your reply~

Re: I.MX6 PCIe power-on initialization sequence

Zhiming_Liu — Thu, 29 Feb 2024 07:31:37 GMT

Hi @jiandong1

This is Synopsys DesignWare PCI IP requirements.

Best Regards

Zhiming

Re: I.MX6 PCIe power-on initialization sequence

jiandong1 — Thu, 29 Feb 2024 08:00:22 GMT

Thank you~

By the way，could you support some related files for study？

Re: I.MX6 PCIe power-on initialization sequence

Zhiming_Liu — Thu, 29 Feb 2024 08:05:40 GMT

The IP SPEC can't share.

Re: I.MX6 PCIe power-on initialization sequence

jiandong1 — Thu, 29 Feb 2024 08:08:31 GMT

ok，thanks~

Re: I.MX6 PCIe power-on initialization sequence

jiandong1 — Fri, 08 Mar 2024 03:17:05 GMT

Done，Thanks ~

Re: I.MX6 PCIe power-on initialization sequence

jiandong1 — Fri, 08 Mar 2024 03:20:23 GMT

Done，Thanks~