<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: VDD_ARM in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM/m-p/1811139#M220102</link>
    <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/229580"&gt;@Brunno&lt;/a&gt;!&lt;BR /&gt;&lt;BR /&gt;For 1.2GHz or lower, you should use 0.85v.&lt;BR /&gt;For 1.6GHz you should use 0.95v&lt;BR /&gt;&lt;BR /&gt;If you use our PMIC with our BSP, the processor configures the PMIC when you change the frequency.&lt;BR /&gt;&lt;BR /&gt;Best Regards!&lt;/P&gt;&lt;P&gt;Chavira&lt;/P&gt;</description>
    <pubDate>Mon, 19 Feb 2024 18:10:00 GMT</pubDate>
    <dc:creator>Chavira</dc:creator>
    <dc:date>2024-02-19T18:10:00Z</dc:date>
    <item>
      <title>VDD_ARM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM/m-p/1809231#M219997</link>
      <description>&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;I am reading the i.MX8M Mini datasheet (IMX8MMIEC rev 2), 11/2022) and more precisely the operating range table 10.&lt;/P&gt;&lt;P&gt;This table gives different VDD_ARM value depending on a frequency value (1.6 or 1.2 GHz). Here are my questions :&lt;/P&gt;&lt;P&gt;- does the frequency value seen in the table refer to the chip reference capabilities (e.g 1.6 GHz), or does it refer to&amp;nbsp; actual frequency at which is running the chip (assuming that it is possible to change internal PLL parameters to lower frequency (e.g 1.2 GHz) ?&lt;/P&gt;&lt;P&gt;- Although the table 10 refers to 1.2GHz parts, the table 2 only references 1.6 Ghz parts. Can you explain ?&lt;/P&gt;&lt;P&gt;- I am wondering how to power a 1.6GHz part running at 1.2G (assuming frequency modification is possible) with the PCA9450A since this PMIC companion sets the VDD_ARM voltage at 0.85V by default. What would you suggest ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;With best regards,&lt;/P&gt;&lt;P&gt;Brunno&lt;/P&gt;</description>
      <pubDate>Thu, 15 Feb 2024 16:17:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM/m-p/1809231#M219997</guid>
      <dc:creator>Brunno</dc:creator>
      <dc:date>2024-02-15T16:17:51Z</dc:date>
    </item>
    <item>
      <title>Re: VDD_ARM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM/m-p/1809388#M220000</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/229580"&gt;@Brunno&lt;/a&gt;!&lt;BR /&gt;Thank you for contacting NXP Support!&lt;BR /&gt;&lt;BR /&gt;With our BSP the CPU frequency changes dynamically, depending on the system load either in response to ACPI events or manually by userspace programs.&lt;BR /&gt;By default on our BSP, the processor changes frequency from 1.2GHz to 1.8GHz on our iMX8MM-EVK.&lt;BR /&gt;&lt;BR /&gt;Using our driver you can get lower frequencies by adding the frequencies on the devicetree.&lt;BR /&gt;&lt;BR /&gt;• The kernel is pre-configured to support only certain frequencies. The list of frequencies currently supported can be obtained from:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;• To get the available scaling governors:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;cat /sys/devices/system/cpu/*/cpufreq/scaling_available_governors&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;• To check the current CPU frequency:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_cur_freq&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;The frequency is displayed depending on the governor set.&lt;BR /&gt;• To check the maximum frequency:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_max_freq&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;• To check the minimum frequency:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_min_freq&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;These commands set a constant CPU frequency:&lt;BR /&gt;• Use the maximum frequency:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;echo performance &amp;gt; /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;• Use the current frequency to be the constant frequency:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;echo userspace &amp;gt; /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;• The following two commands set the scaling governor to a specified frequency, if that frequency is supported.&lt;BR /&gt;If the frequency is not supported, the closest supported frequency is used:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;echo userspace &amp;gt; /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
echo &amp;lt;frequency&amp;gt; &amp;gt; /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed&lt;/LI-CODE&gt;&lt;P&gt;Those functions are supported by our PMIC and you can test them on our iMX8MM-EVK&lt;BR /&gt;&lt;BR /&gt;Best Regards!&lt;BR /&gt;Chavira&lt;/P&gt;</description>
      <pubDate>Thu, 15 Feb 2024 18:34:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM/m-p/1809388#M220000</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2024-02-15T18:34:05Z</dc:date>
    </item>
    <item>
      <title>Re: VDD_ARM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM/m-p/1810081#M220029</link>
      <description>&lt;P&gt;Hi Chavira&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for your quick reply but it does not help that much&lt;/P&gt;&lt;P&gt;Let me as the question in a different way, based on a&amp;nbsp;MIMX8MM3CVTKZAA chip.&lt;/P&gt;&lt;P&gt;- Assume we want to run at 1.2 Ghz. What should be the VDD_ARM voltage value in that case ?&lt;/P&gt;&lt;P&gt;-&amp;nbsp;Assume we want to run at 1.00 Ghz. What should be the VDD_ARM voltage value in that case ?&lt;/P&gt;&lt;P&gt;- Assume we want to run at 1.6 Ghz. What should be the VDD_ARM voltage value in that case ?&lt;/P&gt;&lt;P&gt;- Should I understand that the PMIC, or any other power supply solution has to be reprogrammed depending on our frequency target ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;With best regards,&lt;/P&gt;&lt;P&gt;Brunno&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 16 Feb 2024 15:25:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM/m-p/1810081#M220029</guid>
      <dc:creator>Brunno</dc:creator>
      <dc:date>2024-02-16T15:25:46Z</dc:date>
    </item>
    <item>
      <title>Re: VDD_ARM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM/m-p/1811139#M220102</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/229580"&gt;@Brunno&lt;/a&gt;!&lt;BR /&gt;&lt;BR /&gt;For 1.2GHz or lower, you should use 0.85v.&lt;BR /&gt;For 1.6GHz you should use 0.95v&lt;BR /&gt;&lt;BR /&gt;If you use our PMIC with our BSP, the processor configures the PMIC when you change the frequency.&lt;BR /&gt;&lt;BR /&gt;Best Regards!&lt;/P&gt;&lt;P&gt;Chavira&lt;/P&gt;</description>
      <pubDate>Mon, 19 Feb 2024 18:10:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM/m-p/1811139#M220102</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2024-02-19T18:10:00Z</dc:date>
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  </channel>
</rss>

