topic Re: MIPI DSI eDP Bridge SN65DSI86 Porting Problem on IMX8MP in i.MX Processors

MIPI DSI eDP Bridge SN65DSI86 Porting Problem on IMX8MP

MJD — Thu, 18 Jan 2024 13:31:22 GMT

root@imx8mp-lpddr4-evk:~# modprobe ti-sn65dsi86
root@imx8mp-lpddr4-evk:~# dmesg | grep dsi
[ 0.078721] platform 32e80000.lcd-controller: Fixed dependency cycle(s) with /soc@0/bus@32c00000/mipi_dsi@32e60000/port@0/endpoint
[ 2.191347] i2c 1-003d: Fixed dependency cycle(s) with /soc@0/bus@32c00000/mipi_dsi@32e60000/port@1/endpoint
[ 2.243122] adv7511 1-003d: Probe failed. Remote port 'mipi_dsi@32e60000' disabled
[ 2.554606] imx_sec_dsim_drv 32e60000.mipi_dsi: version number is 0x1060200
[ 2.561629] [drm:drm_bridge_attach] *ERROR* failed to attach bridge /soc@0/bus@32c00000/mipi_dsi@32e60000 to encoder DSI-40: -19
[ 2.573223] imx_sec_dsim_drv 32e60000.mipi_dsi: Failed to attach bridge: 32e60000.mipi_dsi
[ 2.581502] imx_sec_dsim_drv 32e60000.mipi_dsi: failed to bind sec dsim bridge: -19
[ 2.589173] imx-drm display-subsystem: bound 32e60000.mipi_dsi (ops imx_sec_dsim_ops)
[ 4.496265] systemd-sysv-generator[191]: SysV service '/etc/init.d/sendsigs' lacks a native systemd unit file. Automatically generating a unit file for compatibility. Please update package to include a nativ.
root@imx8mp-lpddr4-evk:~#

#include <dt-bindings/usb/pd.h>

#include "imx8mp.dtsi"

/ {

model = "NXP i.MX8MP SOM on AB2";

compatible = "fsl,imx8mp-ab2", "fsl,imx8mp";

chosen {

stdout-path = &uart2;

};

....

&i2c1 {

clock-frequency = <400000>;

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_i2c1>;

status = "okay";

sn65dsi86@2d {

compatible = "ti,sn65dsi86";

#address-cells = <1>;

#size-cells = <0>;

reg = <0x2c>;

ti,dsi-lanes = <4>;

max,dsi-channel = <1>;

ti,dp-lanes = <2>;

enable-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;

interrupts-extended = <&gpio5 12 IRQ_TYPE_EDGE_FALLING>;

vccio-supply = <&buck5>; //1.8V

vpll-supply = <&buck5>; //1.8V

clock-names = "refclk";

clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,

<&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;

status = "okay";

panel@0 {

reg = <0>;

pinctrl-0 = <&pinctrl_mipi_dsi_en>;

enable-gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;

panel-width-mm = <68>;

panel-height-mm = <130>;

port {

panel1_in: endpoint {

remote-endpoint = <&sn65_out>;

};

ports {

#address-cells = <1>;

#size-cells = <0>;

port@0 {

reg = <0>;

sn65_in: endpoint {

remote-endpoint = <&dsim_to_sn65>;

};

port@1 {

reg = <1>;

sn65_out: endpoint {

data-lanes = <0 1 2 3>;

lane-polarities = <0 1 0 1>;

remote-endpoint = <&panel1_in>;

};

};
...
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;

pinctrl_mipi_dsi_en: mipi_dsi_en {
fsl,pins = <
MX8MP_IOMUXC_ECSPI2_SCLK__GPIO5_IO10 0x15
>;

&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;

pinctrl_mipi_dsi_en: mipi_dsi_en {
fsl,pins = <
MX8MP_IOMUXC_ECSPI2_SCLK__GPIO5_IO10 0x15
>;
};

dts file attached.

Re: MIPI DSI eDP Bridge SN65DSI86 Porting Problem on IMX8MP

AldoG — Wed, 24 Jan 2024 00:49:09 GMT

Hello,

Is there any reason why you are using audio board device tree?
From the logs it seems that you are using our EVK, but please note that the I2C port used in the MIPI-DSI port is the I2C2 not the I2C1 as you have added.

Best regards/Saludos,
Aldo.

Re: MIPI DSI eDP Bridge SN65DSI86 Porting Problem on IMX8MP

MJD — Tue, 06 Feb 2024 06:05:15 GMT

Hi @AldoG

We are trying to bring up MIPI_DSI -> DSI_eDP bridge (ti_sn65dsi86) -> eDP_LCD panel we are able to communicate to the bridge using i2cset and invoke built in colorbar is display on LCD panel, however we are not able to get the mipi_dsi output on the LCD

This are the below log which we are getting on drm and we don't see any signals on MIPI_DSI1_CLK_N , MIPI_DSI1_CLK_P and in data lines

root@imx8mp-lpddr4-evk:~# dmesg | grep "drm"
[ 1.915811] [drm] Initialized vivante 1.0.0 20170808 for 40000000.mix_gpu_ml on minor 0
[ 2.399839] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 2.954649] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 2.982044] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 3.007581] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 3.080522] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 3.112860] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 3.201638] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 4.924266] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 5.088957] systemd[1]: Starting Load Kernel Module drm...
[ 5.941319] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 5.977932] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.010452] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.039962] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.301348] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.386189] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.407274] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.462080] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.548778] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.617028] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.642665] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.666201] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.851009] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.956144] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 7.719265] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
root@imx8mp-lpddr4-evk:~# lsmod
Module Size Used by
overlay 122880 0
fsl_jr_uio 20480 0
caam_jr 180224 0
caamkeyblob_desc 16384 1 caam_jr
caamhash_desc 16384 1 caam_jr
caamalg_desc 40960 1 caam_jr
crypto_engine 20480 1 caam_jr
rng_core 24576 1 caam_jr
authenc 16384 1 caam_jr
libdes 24576 1 caam_jr
crct10dif_ce 20480 1
snd_soc_imx_hdmi 16384 0
snd_soc_fsl_asoc_card 28672 0
snd_soc_imx_audmux 16384 1 snd_soc_fsl_asoc_card
snd_soc_imx_card 20480 0
imx8_media_dev 20480 0
snd_soc_fsl_aud2htx 16384 0
snd_soc_fsl_easrc 45056 0
snd_soc_fsl_micfil 45056 2
snd_soc_fsl_asrc 40960 1 snd_soc_fsl_easrc
snd_soc_fsl_sai 40960 2
snd_soc_fsl_xcvr 32768 2
ti_sn65dsi86 28672 0
snd_soc_wm8960 49152 0
flexcan 32768 0
secvio 20480 0
caam 28672 1 caam_jr
can_dev 36864 1 flexcan
error 24576 7 caamalg_desc,secvio,caamkeyblob_desc,caamhash_desc,caam,caam_jr,fsl_jr_uio
imx_dsp_rproc 20480 0
option 57344 0
usb_wwan 24576 1 option
fuse 131072 1
root@imx8mp-lpddr4-evk:~#

DTS which we are working on,

edp_backlight: edp_backlight {

compatible = "pwm-backlight";

pwms = <&pwm1 0 100000>;

status = "okay";

brightness-levels = < 0 1 2 3 4 5 6 7 8 9

10 11 12 13 14 15 16 17 18 19

20 21 22 23 24 25 26 27 28 29

30 31 32 33 34 35 36 37 38 39

40 41 42 43 44 45 46 47 48 49

50 51 52 53 54 55 56 57 58 59

60 61 62 63 64 65 66 67 68 69

70 71 72 73 74 75 76 77 78 79

80 81 82 83 84 85 86 87 88 89

90 91 92 93 94 95 96 97 98 99

100>;

default-brightness-level = <80>;

};

sn65dsi86_refclk: sn65dsi86-refclk {

compatible = "fixed-clock";

#clock-cells = <0>;

clock-frequency = <27000000>;

};

&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";

#if 0
sn65_bridge: sn65dsi86@2c {
#address-cells = <1>;
#size-cells = <0>;
compatible = "ti,sn65dsi86";
reg = <0x2c>;
ti,dsi-lanes = <4>;
max,dsi-channel = <1>;
ti,dp-lanes = <2>;
status = "okay";
pinctrl-0 = <&pinctrl_mipi_dsi_en>;
enable-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
interrupts-extended = <&gpio5 12 IRQ_TYPE_EDGE_FALLING>;
/*vccio-supply = <&ldo6_reg>; //1.8V
vcca-supply = <&buck1_reg>; //1.2V
vpll-supply = <&ldo6_reg>; //1.8V
vcc-supply = <&buck1_reg>; //1.2V*/
clock-names = "refclk";
clocks = <&sn65dsi86_refclk>;
no-hpd;
sn65dsi86,addresses = <0x0A 0x10 0x12 0x13
0x94 0x0D 0x64 0x74
0x75 0x76 0x77 0x78
0x5A 0x93 0x96 0x20
0x21 0x22 0x23 0x24
0x25 0x2C 0x2D 0x30
0x31 0x34 0x36 0x3A
0x5B 0x3C 0x5A>;

sn65dsi86,values = <0x06 0x26 0x54 0x54
0x80 0x01 0x01 0x00
0x01 0x0A 0x01 0x81
0x05 0x20 0x0A 0x80
0x07 0x00 0x00 0x38
0x04 0x20 0x00 0x06
0x00 0x8E 0x0B 0x30
0x03 0x00 0x14 0x0D>;

/*ports {
#address-cells = <1>;
#size-cells = <0>;
//IN(DSI===>SN65DSI)
port@1 {
reg = <1>;
sn65_in: endpoint {
remote-endpoint = <&dsim_to_sn65>;
};
};
//out
port@2 {
reg = <2>;
sn65_to_panel: endpoint {
data-lanes = <0 1 2 3>;
lane-polarities = <0 1 0 1>;
remote-endpoint = <&panel_from_sn65>;
};
};
};*/

};
#endif
sn65dsi86_bridge: bridge@2c {
compatible = "ti,sn65dsi86";
reg = <0x2c>;
ti,dsi-lanes = <4>;
max,dsi-channel = <1>;
ti,dp-lanes = <2>;

pinctrl-0 = <&pinctrl_mipi_dsi_en>;
enable-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
interrupts-extended = <&gpio5 12 IRQ_TYPE_EDGE_FALLING>;

/*vpll-supply = <&src_pp1800_s4a>;
vccio-supply = <&src_pp1800_s4a>;
vcca-supply = <&src_pp1200_l2a>;
vcc-supply = <&src_pp1200_l2a>;*/

clocks = <&sn65dsi86_refclk>;
clock-names = "refclk";

no-hpd;

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
sn65dsi86_in: endpoint {
remote-endpoint = <&dsim_to_sn65>;
};
};

port@1 {
reg = <1>;
sn65dsi86_out: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};

aux-bus {
panel {
compatible = "novatek,nt71832","panel-simple";
status = "okay";
dsi-lanes = <4>;
//video-mode = <2>;
//pixel-format = <RGB888>;
backlight = <&edp_backlight>;
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
};

&mipi_dsi {

status = "okay";

ports {

port@2 {

reg = <2>;

dsim_to_sn65: endpoint {

remote-endpoint = <&sn65dsi86_in>;

attach-bridge;

};

Re: MIPI DSI eDP Bridge SN65DSI86 Porting Problem on IMX8MP

AldoG — Thu, 08 Feb 2024 00:52:34 GMT

Hello @MJD,

I'm still reviewing this, could you share the kernel version you are using?
We have seen some issues with kernel version 6.1 on this device (SN65DSI86)

Best regards/Saludos,
Aldo.

Re: MIPI DSI eDP Bridge SN65DSI86 Porting Problem on IMX8MP

MJD — Thu, 08 Feb 2024 01:46:54 GMT

Kernel version 5.15

Re: MIPI DSI eDP Bridge SN65DSI86 Porting Problem on IMX8MP

sean33996 — Wed, 27 Mar 2024 06:10:20 GMT

&mipi_dsi {
status = "okay";

ports {
port@2 {

i think we shoud use port@1 for output ,

I have seen several examples of dts, port@0 is for input, and port@1 is for output

Are you working normally, could you share your DTS and the modified ti-sn65dsi86. c

Re: MIPI DSI eDP Bridge SN65DSI86 Porting Problem on IMX8MP

sean33996 — Wed, 27 Mar 2024 07:06:54 GMT

I saw that you used two different formats to configure DSI86 in the dts

1. mipi panel DSI86 configuration data in dts

》》Is this method flawed? Why did you give up

2. edp panel , DSI is a bridge add to drm

》》DSI86 configuration Is it done in the enable function of the driver file SN65DSI86.c