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    <title>i.MX ProcessorsのトピックRe: SEMC</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1787957#M218636</link>
    <description>有相关的参考例程么</description>
    <pubDate>Fri, 12 Jan 2024 10:32:01 GMT</pubDate>
    <dc:creator>ma123456</dc:creator>
    <dc:date>2024-01-12T10:32:01Z</dc:date>
    <item>
      <title>SEMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1783601#M218282</link>
      <description>&lt;P&gt;您好，&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; 我想使用SEMC连接FPGA，都需要哪些引脚呢，FPGA是需要模拟为SRAM么？&lt;/P&gt;</description>
      <pubDate>Fri, 05 Jan 2024 09:43:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1783601#M218282</guid>
      <dc:creator>ma123456</dc:creator>
      <dc:date>2024-01-05T09:43:39Z</dc:date>
    </item>
    <item>
      <title>Re: SEMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1784624#M218395</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/208959"&gt;@ma123456&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Please look at the following community post where my colleague shares some useful resources about the connection of the RT with and FPGA. I believe you will find them useful:&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-RT/MIMXRT1051-SEMC-connect-FPGA/m-p/1385947" target="_blank"&gt;https://community.nxp.com/t5/i-MX-RT/MIMXRT1051-SEMC-connect-FPGA/m-p/1385947&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Do let me know if you have further inquiries about this topic.&lt;/P&gt;
&lt;P&gt;BR,&lt;BR /&gt;Edwin.&lt;/P&gt;</description>
      <pubDate>Mon, 08 Jan 2024 19:29:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1784624#M218395</guid>
      <dc:creator>EdwinHz</dc:creator>
      <dc:date>2024-01-08T19:29:42Z</dc:date>
    </item>
    <item>
      <title>Re: SEMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1784711#M218399</link>
      <description>您好，&lt;BR /&gt;不好意思，我还是不太清楚：&lt;BR /&gt;1、如果数据线和地址线都使用的话，是只有FPGA当做SDRAM这种方式吧，那这种方式，有很多其他的引脚，这个是需要的么&lt;BR /&gt;2、如果FPGA当做SRAM，那么其中的CE#与CRE信号是怎么使用呢</description>
      <pubDate>Tue, 09 Jan 2024 01:24:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1784711#M218399</guid>
      <dc:creator>ma123456</dc:creator>
      <dc:date>2024-01-09T01:24:10Z</dc:date>
    </item>
    <item>
      <title>Re: SEMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1785550#M218486</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/208959"&gt;@ma123456&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;1. Yes, the FPGA would have to be an SRAM-like device.&lt;/P&gt;
&lt;P&gt;2. In order to provide a better answer for you, could you please specify what is the part number that you are currently using?&lt;/P&gt;
&lt;P&gt;BR,&lt;BR /&gt;Edwin.&lt;/P&gt;</description>
      <pubDate>Tue, 09 Jan 2024 22:17:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1785550#M218486</guid>
      <dc:creator>EdwinHz</dc:creator>
      <dc:date>2024-01-09T22:17:54Z</dc:date>
    </item>
    <item>
      <title>Re: SEMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1785595#M218491</link>
      <description>1、大多数是将FPGA当做SRAM还是SDRAM呢，因为这两种使用的线数是不一样的，有哪些是必须的呢&lt;BR /&gt;2、芯片为RT1052</description>
      <pubDate>Wed, 10 Jan 2024 01:20:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1785595#M218491</guid>
      <dc:creator>ma123456</dc:creator>
      <dc:date>2024-01-10T01:20:00Z</dc:date>
    </item>
    <item>
      <title>Re: SEMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1787496#M218607</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/208959"&gt;@ma123456&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;The connection to the FPGA would be according to the "SRAM (ADMUX 16bit)" of the&amp;nbsp;Table 25-6. SEMC Pin Mux Overview from the Reference Manual. In the case of unused signals like&amp;nbsp;&lt;SPAN&gt;CE# and CRE, they can remain unconnected.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;BR,&lt;BR /&gt;Edwin.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 11 Jan 2024 21:54:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1787496#M218607</guid>
      <dc:creator>EdwinHz</dc:creator>
      <dc:date>2024-01-11T21:54:47Z</dc:date>
    </item>
    <item>
      <title>Re: SEMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1787957#M218636</link>
      <description>有相关的参考例程么</description>
      <pubDate>Fri, 12 Jan 2024 10:32:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SEMC/m-p/1787957#M218636</guid>
      <dc:creator>ma123456</dc:creator>
      <dc:date>2024-01-12T10:32:01Z</dc:date>
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