<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic IMX8 LInux: PMIC and Reboot sequence in Linux in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8-LInux-PMIC-and-Reboot-sequence-in-Linux/m-p/1785721#M218499</link>
    <description>&lt;P&gt;I have two boards which are designed very close to the below boards&lt;/P&gt;&lt;P&gt;1) imx8m&lt;STRONG&gt;p&lt;/STRONG&gt;-evk&lt;/P&gt;&lt;P&gt;2) imx8m&lt;STRONG&gt;q&lt;/STRONG&gt;-evk&lt;/P&gt;&lt;P&gt;I would like to know what happens under the hood when I issue "reboot" in Linux . Is it just the soft reset of the ARM cores involved, or is the PMIC involved (PCA9450 for imx8mp) ? If PMIC is involved, what actually happens under the hood when linux reboot command finishes? Does linux write in to the PMIC registers through I2C to issue a PMIC reset? Or does the linux assert WDOG_B (GPIO1_2) which is connected to WDOG_B of PMIC and resulting in reset?&lt;/P&gt;&lt;P&gt;Does the reset mechanism differ between imx8m&lt;STRONG&gt;p&lt;/STRONG&gt; and imx8m&lt;STRONG&gt;q&amp;nbsp;&lt;/STRONG&gt;? We are seeing some issues in our imx8mq board where the PMIC reset does not happen, but just the ARM goes through warm reset. (does not bring the whole SOC power reset as the imx8m&lt;STRONG&gt;p)&amp;nbsp;&lt;/STRONG&gt;does.&amp;nbsp;&lt;BR /&gt;&amp;nbsp; Any insight/help is appreciated&lt;BR /&gt;Thanks&lt;/P&gt;</description>
    <pubDate>Wed, 10 Jan 2024 04:20:33 GMT</pubDate>
    <dc:creator>mahesh_hns</dc:creator>
    <dc:date>2024-01-10T04:20:33Z</dc:date>
    <item>
      <title>IMX8 LInux: PMIC and Reboot sequence in Linux</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8-LInux-PMIC-and-Reboot-sequence-in-Linux/m-p/1785721#M218499</link>
      <description>&lt;P&gt;I have two boards which are designed very close to the below boards&lt;/P&gt;&lt;P&gt;1) imx8m&lt;STRONG&gt;p&lt;/STRONG&gt;-evk&lt;/P&gt;&lt;P&gt;2) imx8m&lt;STRONG&gt;q&lt;/STRONG&gt;-evk&lt;/P&gt;&lt;P&gt;I would like to know what happens under the hood when I issue "reboot" in Linux . Is it just the soft reset of the ARM cores involved, or is the PMIC involved (PCA9450 for imx8mp) ? If PMIC is involved, what actually happens under the hood when linux reboot command finishes? Does linux write in to the PMIC registers through I2C to issue a PMIC reset? Or does the linux assert WDOG_B (GPIO1_2) which is connected to WDOG_B of PMIC and resulting in reset?&lt;/P&gt;&lt;P&gt;Does the reset mechanism differ between imx8m&lt;STRONG&gt;p&lt;/STRONG&gt; and imx8m&lt;STRONG&gt;q&amp;nbsp;&lt;/STRONG&gt;? We are seeing some issues in our imx8mq board where the PMIC reset does not happen, but just the ARM goes through warm reset. (does not bring the whole SOC power reset as the imx8m&lt;STRONG&gt;p)&amp;nbsp;&lt;/STRONG&gt;does.&amp;nbsp;&lt;BR /&gt;&amp;nbsp; Any insight/help is appreciated&lt;BR /&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Wed, 10 Jan 2024 04:20:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8-LInux-PMIC-and-Reboot-sequence-in-Linux/m-p/1785721#M218499</guid>
      <dc:creator>mahesh_hns</dc:creator>
      <dc:date>2024-01-10T04:20:33Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8 LInux: PMIC and Reboot sequence in Linux</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8-LInux-PMIC-and-Reboot-sequence-in-Linux/m-p/1786732#M218548</link>
      <description>&lt;P&gt;Reboot command will cause PMIC reset with WDOG_B signal.&lt;/P&gt;
&lt;P&gt;The difference between i.MX8MQ and i.MX8MP is that&amp;nbsp; WDOG signal will case SOC_0V9 reset on i.MX8MQ EVK.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Zhiming_Liu_0-1704942284782.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/257639iFF5F6CE70CFE277B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Zhiming_Liu_0-1704942284782.png" alt="Zhiming_Liu_0-1704942284782.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 11 Jan 2024 03:05:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8-LInux-PMIC-and-Reboot-sequence-in-Linux/m-p/1786732#M218548</guid>
      <dc:creator>Zhiming_Liu</dc:creator>
      <dc:date>2024-01-11T03:05:25Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8 LInux: PMIC and Reboot sequence in Linux</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8-LInux-PMIC-and-Reboot-sequence-in-Linux/m-p/1787381#M218601</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/151788"&gt;@Zhiming_Liu&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have a similar question but regarding a different EVK: iMX8QM MEK.&lt;/P&gt;&lt;P&gt;On this board the 'reboot' command does not reset PMIC, but pressing the reset button does. The WDOG_IN pin (WDI) to PMIC (PF8100) takes input from the reset button and SCU_WDOG_OUT from iMX8QM. It appears that if 'reboot' is to work the same as iMX8MP EVK, the SCU_WDOG_OUT needs to toggle. The current 'reboot' command came with iMX8QM MEK BSP does not do that.&lt;/P&gt;&lt;P&gt;How to change the BSP so 'reboot' can support this feature? Do both Linux and SCFW need to change? SCFW porting guide does not give direction how to achieve this.&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;</description>
      <pubDate>Thu, 11 Jan 2024 16:41:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8-LInux-PMIC-and-Reboot-sequence-in-Linux/m-p/1787381#M218601</guid>
      <dc:creator>ochu</dc:creator>
      <dc:date>2024-01-11T16:41:40Z</dc:date>
    </item>
  </channel>
</rss>

