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    <title>topic Re: imx rt: FlexSPI lookup tables in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx-rt-FlexSPI-lookup-tables/m-p/1782932#M218213</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/189239"&gt;@bp1979&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; I think you mentioned the code like the following IP method:&lt;/P&gt;
&lt;DIV style="background-color: #ffffff; padding: 0px 0px 0px 2px;"&gt;
&lt;DIV style="color: #000000; background-color: #ffffff; font-family: 'Consolas'; font-size: 10pt; white-space: nowrap;"&gt;
&lt;P&gt;&lt;SPAN&gt;status_t&lt;/SPAN&gt; &lt;SPAN&gt;flexspi_nor_flash_erase_sector&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;FLEXSPI_Type&lt;/SPAN&gt;&lt;SPAN&gt; *base, &lt;/SPAN&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;SPAN&gt; address)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;status_t&lt;/SPAN&gt;&lt;SPAN&gt; status;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;flexspi_transfer_t&lt;/SPAN&gt;&lt;SPAN&gt; flashXfer;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#if&lt;/SPAN&gt;&lt;SPAN&gt; defined(CACHE_MAINTAIN) &amp;amp;&amp;amp; CACHE_MAINTAIN&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;flexspi_cache_status_t&lt;/SPAN&gt;&lt;SPAN&gt; cacheStatus;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flexspi_nor_disable_cache(&amp;amp;cacheStatus);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#endif&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;/* Write enable */&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;deviceAddress&lt;/SPAN&gt;&lt;SPAN&gt; = address;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;port&lt;/SPAN&gt;&lt;SPAN&gt; = FLASH_PORT;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;cmdType&lt;/SPAN&gt;&lt;SPAN&gt; = &lt;/SPAN&gt;&lt;SPAN&gt;kFLEXSPI_Command&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;SeqNumber&lt;/SPAN&gt;&lt;SPAN&gt; = 1;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;seqIndex&lt;/SPAN&gt;&lt;SPAN&gt; = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; status = FLEXSPI_TransferBlocking(base, &amp;amp;flashXfer);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; (status != &lt;/SPAN&gt;&lt;SPAN&gt;kStatus_Success&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;return&lt;/SPAN&gt;&lt;SPAN&gt; status;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; }&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;deviceAddress&lt;/SPAN&gt;&lt;SPAN&gt; = address;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;port&lt;/SPAN&gt;&lt;SPAN&gt; = FLASH_PORT;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;cmdType&lt;/SPAN&gt;&lt;SPAN&gt; = &lt;/SPAN&gt;&lt;SPAN&gt;kFLEXSPI_Command&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt; flashXfer.SeqNumber = 1;&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt; flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_ERASESECTOR;&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; status = FLEXSPI_TransferBlocking(base, &amp;amp;flashXfer);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; (status != &lt;/SPAN&gt;&lt;SPAN&gt;kStatus_Success&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;return&lt;/SPAN&gt;&lt;SPAN&gt; status;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; }&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; status = flexspi_nor_wait_bus_busy(base);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;/* Do software reset. */&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; FLEXSPI_SoftwareReset(base);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#if&lt;/SPAN&gt;&lt;SPAN&gt; defined(CACHE_MAINTAIN) &amp;amp;&amp;amp; CACHE_MAINTAIN&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flexspi_nor_enable_cache(cacheStatus);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#endif&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;return&lt;/SPAN&gt;&lt;SPAN&gt; status;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;To this situation, normally, the seqNumber is set to 1, as it just call 1 number.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Then, it use the SeqIndex to the related LUT commander to find the detail operation.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;So, it's correct.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Wish it helps you!&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Kerry&lt;/SPAN&gt;&lt;/P&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;</description>
    <pubDate>Thu, 04 Jan 2024 09:49:10 GMT</pubDate>
    <dc:creator>kerryzhou</dc:creator>
    <dc:date>2024-01-04T09:49:10Z</dc:date>
    <item>
      <title>imx rt: FlexSPI lookup tables</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx-rt-FlexSPI-lookup-tables/m-p/1782248#M218158</link>
      <description>&lt;P&gt;I am having a hard time understanding how the nor polling SDK example deals with lookup tables.&lt;/P&gt;&lt;P&gt;From the reference manual, I understand that the LUT makes room for N sequences. Each sequence consists of 8 * 16bit instructions.&lt;/P&gt;&lt;P&gt;The SDK example defines a LUT sequence as an array of 4 32bit words (a bit weird, but sure, same length).&lt;/P&gt;&lt;P&gt;Then the SDK example defines the entire LUT for the internal flash memory device that comes with the 1024 CPU.&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;const uint32_t customLUT[CUSTOM_LUT_LENGTH] = {
    /* Normal read mode -SDR */
    /* Normal read mode -SDR */
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Fast read mode - SDR */
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] = FLEXSPI_LUT_SEQ(
        kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

    /* Fast read quad mode - SDR */
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] = FLEXSPI_LUT_SEQ(
        kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x06, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04),

    /* Read extend parameters */
    [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x81, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

    /* Write Enable */
    [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Erase Sector  */
    [4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),

    /* Page Program - single mode */
    [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x02, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE + 1] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Page Program - quad mode */
    [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x32, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD + 1] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Read ID */
    [4 * NOR_CMD_LUT_SEQ_IDX_READID] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x9F, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

    /* Enable Quad mode */
    [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x31, kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04),

    /* Enter QPI mode */
    [4 * NOR_CMD_LUT_SEQ_IDX_ENTERQPI] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x35, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Exit QPI mode */
    [4 * NOR_CMD_LUT_SEQ_IDX_EXITQPI] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_4PAD, 0xF5, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Read status register */
    [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUSREG] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x05, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

    /* Erase whole chip */
    [4 * NOR_CMD_LUT_SEQ_IDX_ERASECHIP] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xC7, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;The macro FLEXSPI_LUT_SEQ creates the "LUT sequence" which is the array of 4 * 32bit words, equal to 8 * 16bit instructions.&lt;/P&gt;&lt;P&gt;Then, every time an IP command is send to FlexSPI, it refers to a SeqNumber and a SeqIndex. The SeqNumber is practically always 1. Why? Shouldn't this index match the index in the array?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 03 Jan 2024 10:35:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx-rt-FlexSPI-lookup-tables/m-p/1782248#M218158</guid>
      <dc:creator>bp1979</dc:creator>
      <dc:date>2024-01-03T10:35:08Z</dc:date>
    </item>
    <item>
      <title>Re: imx rt: FlexSPI lookup tables</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx-rt-FlexSPI-lookup-tables/m-p/1782932#M218213</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/189239"&gt;@bp1979&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; I think you mentioned the code like the following IP method:&lt;/P&gt;
&lt;DIV style="background-color: #ffffff; padding: 0px 0px 0px 2px;"&gt;
&lt;DIV style="color: #000000; background-color: #ffffff; font-family: 'Consolas'; font-size: 10pt; white-space: nowrap;"&gt;
&lt;P&gt;&lt;SPAN&gt;status_t&lt;/SPAN&gt; &lt;SPAN&gt;flexspi_nor_flash_erase_sector&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;FLEXSPI_Type&lt;/SPAN&gt;&lt;SPAN&gt; *base, &lt;/SPAN&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;SPAN&gt; address)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;status_t&lt;/SPAN&gt;&lt;SPAN&gt; status;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;flexspi_transfer_t&lt;/SPAN&gt;&lt;SPAN&gt; flashXfer;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#if&lt;/SPAN&gt;&lt;SPAN&gt; defined(CACHE_MAINTAIN) &amp;amp;&amp;amp; CACHE_MAINTAIN&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;flexspi_cache_status_t&lt;/SPAN&gt;&lt;SPAN&gt; cacheStatus;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flexspi_nor_disable_cache(&amp;amp;cacheStatus);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#endif&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;/* Write enable */&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;deviceAddress&lt;/SPAN&gt;&lt;SPAN&gt; = address;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;port&lt;/SPAN&gt;&lt;SPAN&gt; = FLASH_PORT;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;cmdType&lt;/SPAN&gt;&lt;SPAN&gt; = &lt;/SPAN&gt;&lt;SPAN&gt;kFLEXSPI_Command&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;SeqNumber&lt;/SPAN&gt;&lt;SPAN&gt; = 1;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;seqIndex&lt;/SPAN&gt;&lt;SPAN&gt; = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; status = FLEXSPI_TransferBlocking(base, &amp;amp;flashXfer);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; (status != &lt;/SPAN&gt;&lt;SPAN&gt;kStatus_Success&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;return&lt;/SPAN&gt;&lt;SPAN&gt; status;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; }&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;deviceAddress&lt;/SPAN&gt;&lt;SPAN&gt; = address;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;port&lt;/SPAN&gt;&lt;SPAN&gt; = FLASH_PORT;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flashXfer.&lt;/SPAN&gt;&lt;SPAN&gt;cmdType&lt;/SPAN&gt;&lt;SPAN&gt; = &lt;/SPAN&gt;&lt;SPAN&gt;kFLEXSPI_Command&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt; flashXfer.SeqNumber = 1;&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt; flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_ERASESECTOR;&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; status = FLEXSPI_TransferBlocking(base, &amp;amp;flashXfer);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; (status != &lt;/SPAN&gt;&lt;SPAN&gt;kStatus_Success&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;return&lt;/SPAN&gt;&lt;SPAN&gt; status;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; }&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; status = flexspi_nor_wait_bus_busy(base);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;/* Do software reset. */&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; FLEXSPI_SoftwareReset(base);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#if&lt;/SPAN&gt;&lt;SPAN&gt; defined(CACHE_MAINTAIN) &amp;amp;&amp;amp; CACHE_MAINTAIN&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt; flexspi_nor_enable_cache(cacheStatus);&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;#endif&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;return&lt;/SPAN&gt;&lt;SPAN&gt; status;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;To this situation, normally, the seqNumber is set to 1, as it just call 1 number.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Then, it use the SeqIndex to the related LUT commander to find the detail operation.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;So, it's correct.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Wish it helps you!&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Kerry&lt;/SPAN&gt;&lt;/P&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;</description>
      <pubDate>Thu, 04 Jan 2024 09:49:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx-rt-FlexSPI-lookup-tables/m-p/1782932#M218213</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2024-01-04T09:49:10Z</dc:date>
    </item>
    <item>
      <title>Re: imx rt: FlexSPI lookup tables</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx-rt-FlexSPI-lookup-tables/m-p/1782993#M218224</link>
      <description>&lt;P&gt;I think I am confusing the index with the number. My bad. Thx&lt;/P&gt;</description>
      <pubDate>Thu, 04 Jan 2024 11:17:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx-rt-FlexSPI-lookup-tables/m-p/1782993#M218224</guid>
      <dc:creator>bp1979</dc:creator>
      <dc:date>2024-01-04T11:17:01Z</dc:date>
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