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    <title>topic Re: i.MX6solo MAPSR register Should bit16 be set? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6solo-MAPSR-register-Should-bit16-be-set/m-p/1779859#M217846</link>
    <description>&lt;P&gt;For the 19–16 This field is reserved. So for the bit 16 you can use the value in the&lt;/P&gt;
&lt;DIV class="lia-attachment-row-element lia-attachment-link-row-element"&gt;&lt;A id="link_9" class="lia-link-navigation attachment-link" href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX6DL-Register-Programming-Aids/ta-p/1271441?attachment-id=114627" target="_blank"&gt;MX6DL_MMDC_LPDDR2_register_programming_aid_v1.4.xlsx&lt;/A&gt;&lt;/DIV&gt;</description>
    <pubDate>Tue, 26 Dec 2023 05:53:49 GMT</pubDate>
    <dc:creator>Rita_Wang</dc:creator>
    <dc:date>2023-12-26T05:53:49Z</dc:date>
    <item>
      <title>i.MX6solo MAPSR register Should bit16 be set?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6solo-MAPSR-register-Should-bit16-be-set/m-p/1775935#M217499</link>
      <description>&lt;P&gt;Hi NXP.&lt;BR /&gt;I have a question about the i.MX6 solo's MAPSR register.&lt;BR /&gt;Looking at the register details in 45.12.17, the reset value of bit16 is 0.&lt;BR /&gt;Therefore, I think it is appropriate to set bit 16 to 0 when writing to the MAPSR register.&lt;/P&gt;&lt;P&gt;However, as shown below, in the document, 1 is set when writing to the MAPSR register.&lt;/P&gt;&lt;DIV&gt;ex1) 45.8 LPDDR2 Refresh Rate Update and Timing Derating&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;1. Set MAPSR to 0x00010107&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;5. Write MAPSR to 0x00010106 to re-enable this feature&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;ex2) i.MX6DL Register Programming Aids&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX6DL-Register-Programming-Aids/ta-p/1271441" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX6DL-Register-Programming-Aids/ta-p/1271441&lt;/A&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Ryo_Aoki_0-1702862348355.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/254741i086A3852CD4F05D6/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Ryo_Aoki_0-1702862348355.png" alt="Ryo_Aoki_0-1702862348355.png" /&gt;&lt;/span&gt;&lt;P&gt;In the Excel file, 1 is written as a fixed value to bit 16 of the MAPSR register.&lt;/P&gt;&lt;P&gt;Should bit16 be set to 1 when writing to the MAPSR register?&lt;BR /&gt;I would like to know the recommended value to write to bit16.&lt;/P&gt;&lt;P&gt;Best regards.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/DIV&gt;</description>
      <pubDate>Mon, 18 Dec 2023 01:22:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6solo-MAPSR-register-Should-bit16-be-set/m-p/1775935#M217499</guid>
      <dc:creator>Ryo_Aoki</dc:creator>
      <dc:date>2023-12-18T01:22:43Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6solo MAPSR register Should bit16 be set?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6solo-MAPSR-register-Should-bit16-be-set/m-p/1779859#M217846</link>
      <description>&lt;P&gt;For the 19–16 This field is reserved. So for the bit 16 you can use the value in the&lt;/P&gt;
&lt;DIV class="lia-attachment-row-element lia-attachment-link-row-element"&gt;&lt;A id="link_9" class="lia-link-navigation attachment-link" href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX6DL-Register-Programming-Aids/ta-p/1271441?attachment-id=114627" target="_blank"&gt;MX6DL_MMDC_LPDDR2_register_programming_aid_v1.4.xlsx&lt;/A&gt;&lt;/DIV&gt;</description>
      <pubDate>Tue, 26 Dec 2023 05:53:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6solo-MAPSR-register-Should-bit16-be-set/m-p/1779859#M217846</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2023-12-26T05:53:49Z</dc:date>
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