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    <title>topic i.MX8MP - Shared Memory for Core M7 and Core A53 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-Shared-Memory-for-Core-M7-and-Core-A53/m-p/1775553#M217461</link>
    <description>&lt;P&gt;&lt;SPAN&gt;I need to allocate a memory area that can be accessed by both the Core M7 and the Core A53. This memory area is necessary for the processors to communicate with each other.&lt;BR /&gt;&lt;BR /&gt;That is, from Linux, I should be able to access a certain memory area using mmap (or something similar) to read data. And from the Cortex M7, I should be able to access the same memory area to write data.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Fri, 15 Dec 2023 11:07:44 GMT</pubDate>
    <dc:creator>teleportboy</dc:creator>
    <dc:date>2023-12-15T11:07:44Z</dc:date>
    <item>
      <title>i.MX8MP - Shared Memory for Core M7 and Core A53</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-Shared-Memory-for-Core-M7-and-Core-A53/m-p/1775553#M217461</link>
      <description>&lt;P&gt;&lt;SPAN&gt;I need to allocate a memory area that can be accessed by both the Core M7 and the Core A53. This memory area is necessary for the processors to communicate with each other.&lt;BR /&gt;&lt;BR /&gt;That is, from Linux, I should be able to access a certain memory area using mmap (or something similar) to read data. And from the Cortex M7, I should be able to access the same memory area to write data.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 15 Dec 2023 11:07:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-Shared-Memory-for-Core-M7-and-Core-A53/m-p/1775553#M217461</guid>
      <dc:creator>teleportboy</dc:creator>
      <dc:date>2023-12-15T11:07:44Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP - Shared Memory for Core M7 and Core A53</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-Shared-Memory-for-Core-M7-and-Core-A53/m-p/1776455#M217544</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Yes This is possible, please see the current example in yocto BSP where you have the M4 and shared memory with A53 cores.&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Mon, 18 Dec 2023 15:16:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-Shared-Memory-for-Core-M7-and-Core-A53/m-p/1776455#M217544</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2023-12-18T15:16:29Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP - Shared Memory for Core M7 and Core A53</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-Shared-Memory-for-Core-M7-and-Core-A53/m-p/1776867#M217593</link>
      <description>&lt;P&gt;Any links to materials?&lt;/P&gt;</description>
      <pubDate>Tue, 19 Dec 2023 06:30:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-Shared-Memory-for-Core-M7-and-Core-A53/m-p/1776867#M217593</guid>
      <dc:creator>teleportboy</dc:creator>
      <dc:date>2023-12-19T06:30:20Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8MP - Shared Memory for Core M7 and Core A53</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-Shared-Memory-for-Core-M7-and-Core-A53/m-p/1817422#M220528</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I do have the same need as teleportboy, which is to define a shared memory region between A53 and M7.&lt;/P&gt;&lt;P&gt;How is it possible ? Do someone as example to share ?&lt;BR /&gt;&lt;BR /&gt;thank's&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 28 Feb 2024 10:33:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8MP-Shared-Memory-for-Core-M7-and-Core-A53/m-p/1817422#M220528</guid>
      <dc:creator>ReneB</dc:creator>
      <dc:date>2024-02-28T10:33:48Z</dc:date>
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