Does flex spi support simultaneous read/write?

rdr3e — Wed, 13 Dec 2023 16:20:05 GMT

Hi I am wondering - does the Flex SPI controller support simultaneous read / write?

Let me explain what I mean.

I have the device - FPGA - which once it's clocked immediately sends some data on MISO line.

Eg when I want to issue read operation on FPGA I send the following byte stream:(cmd, addr, length)

MOSI: 0x80 | 0x12 0x34 0x56 | 0x4

MISO: 0x11 | 0xXX 0xXX 0xXX | data[0]... data[3]

As you can see the 0x11 byte is pushed by the FPGA on the same clock cycle as the first byte on MOSI. This is something like a status that allows to verify the device type. The rest 3 bytes are undefined, data[0]...data[3] is actual data that was requested.

Any ideas how can I achieve this?

Re: Does flex spi support simultaneous read/write?

Bio_TICFSL — Thu, 14 Dec 2023 14:13:27 GMT

Hello,

No, is matter of 1uSec but no simultaneously,try to implement this.

Regards

Re: Does flex spi support simultaneous read/write?

rdr3e — Thu, 14 Dec 2023 16:04:34 GMT

Can you elaborate on this: "No, is matter of 1uSec"?

topic Re: Does flex spi support simultaneous read/write? in i.MX Processors

Does flex spi support simultaneous read/write?

Re: Does flex spi support simultaneous read/write?

Re: Does flex spi support simultaneous read/write?