i.MX ProcessorsのトピックRe: IMX8M mini RGMII TO RGMII Connection

IMX8M mini RGMII TO RGMII Connection

HAKANAYDN — Wed, 06 Dec 2023 13:18:02 GMT

Hello,

I want to connect two IMX8 mini cpu over ethernet RGMII Interface not using external PHY. How can I do ? Which pin do I connect between IMX8 ? What do I write my linux device tree ?

Re: IMX8M mini RGMII TO RGMII Connection

JosephAtNXP — Thu, 07 Dec 2023 02:31:49 GMT

Hi,

Thank you for your interest in NXP Semiconductor products,

Add a fixed-link property, this is the documentation.

This would transform the EVK DTS from:

&fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; phy-mode = "rgmii-id"; phy-handle = <&ethphy0>; fsl,magic-packet; status = "okay"; mdio { #address-cells = <1>; #size-cells = <0>; ethphy0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; reset-deassert-us = <80000>; realtek,aldps-enable; realtek,clkout-disable; qca,disable-smarteee; vddio-supply = <&vddio>; vddio: vddio-regulator { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; }; }; };

To:

&fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; phy-mode = "rgmii-id"; fsl,magic-packet; status = "okay"; /* fixed-link node */ fixed-link { speed = <1000>; full-duplex; }; };

Pins needed to be mapped are everyone that's under RGMII spec / everyone that would be mapped to a PHY.

Regards

Re: IMX8M mini RGMII TO RGMII Connection

HAKANAYDN — Thu, 07 Dec 2023 05:26:59 GMT

Thank you for your quick reply. If I understand correctly, I should connect the below pins each other. is it ? will I do anything about fec clock ?

MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f//
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f//
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f//
MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f//

MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91//
MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91//
MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91//
MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91//

MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f//
MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91//

MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91//
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f//

I did like your dtb file for fec. Then I tried on the board and ping from the board to the other board over RGMII to RGMII connection but it was not succesfull. I didnt show any TX clock. do I need any external clock source for FEC ? Could you please write step to step what I do for RGMII to RGMII connection ?

Re: IMX8M mini RGMII TO RGMII Connection

JosephAtNXP — Mon, 18 Dec 2023 19:24:06 GMT

Hi,

I think I found the issue, according to the bindings definition:

# RX and TX delays are added by the MAC when required
- rgmii

# RGMII with internal RX and TX delays provided by the PHY,
# the MAC should not add the RX or TX delays in this case
- rgmii-id

rgmii should be selected as phy-mode,

TXC is properly configured, let me know if the above change did enable TXC

Thank you,