i.MX ProcessorsのトピックRe: LVDS_PHY_CTRL sharing

LVDS_PHY_CTRL sharing

krassimirestoya — Tue, 21 Nov 2023 10:21:15 GMT

Hi all,

We are trying to share access to LVDS_PHY_CTRL regster, owner by the A35 partition under Linux (Yocto). We want to access it via SCU board_ioctl or CM4 directly, if possible:

this is from board_ioctl:

BRD_ERR(rm_set_peripheral_permissions(PWR_PT_6, SC_R_MIPI_0, SC_RM_PT_ALL, SC_RM_PERM_FULL)); // success
BRD_ERR(rm_set_peripheral_permissions(PWR_PT_6, SC_R_MIPI_1, SC_RM_PT_ALL, SC_RM_PERM_FULL)); // success
BRD_ERR(rm_set_peripheral_permissions(PWR_PT_6, SC_R_LVDS_0, SC_RM_PT_ALL, SC_RM_PERM_FULL)); // Fails with SC_ERR_PARM
BRD_ERR(rm_set_peripheral_permissions(PWR_PT_6, SC_R_LVDS_1, SC_RM_PT_ALL, SC_RM_PERM_FULL)); // Fails with SC_ERR_PARM

volatile int *p = (volatile int *)0x56221000; //LVDS_PHY_CTRL
*p = 0;
p = (volatile int *)0x56241000;
*p = 0;

This code causes SCU to crash

Re: LVDS_PHY_CTRL sharing

Bio_TICFSL — Fri, 01 Dec 2023 16:15:54 GMT

Hello,

There are few hints that can help narrow this issue:

1. They suggestion is to ensure is to enabled power domain to access the register.

2. SC_ERR_PARM means bad parameter or combination of parameters

I am looking into SDK. I am working on getting to run example (dpu_blitblend) which controls register LVDS_PHY_CTRL from M4 core - Visteon's use-case. You have to try to extract specific setting needed.

But in the meantime, you can see into example source code (attached) and use it as inspiration, what needs to be done to write the register.

Regards

Re: LVDS_PHY_CTRL sharing

krassimirestoya — Mon, 04 Dec 2023 08:00:36 GMT

Thanks for the reply, but we need to share it as the subject is