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    <title>i.MX ProcessorsのトピックUsing PCIe on i.MX8MP with internal clock on Linux-imx 6.1.36</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Using-PCIe-on-i-MX8MP-with-internal-clock-on-Linux-imx-6-1-36/m-p/1765759#M216560</link>
    <description>&lt;P&gt;Hello everyone,&lt;/P&gt;&lt;P&gt;I'm trying to set up the dts to use the PCIe interface on a uSOM equipped with an i.MX8MP processor. I know for sure that the hardware is ok because I'm using the uSOM with a development board and everything is ok when using the linux-imx 5.15.32.&lt;BR /&gt;The problems arise when using the latest linux-imx 6.1.36: I get a " phy phy-32f00000.pcie-phy.2: phy poweron failed --&amp;gt; -110" in the dmesg, a symptom that the PCIe PHY is not being properly clocked.&lt;BR /&gt;&lt;BR /&gt;The dts fragment for the PCIe is the following:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;&amp;amp;pcie_phy {
	fsl,refclk-pad-mode = &amp;lt;IMX8_PCIE_REFCLK_PAD_UNUSED&amp;gt;;
	clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_AXI&amp;gt;;
	clock-names = "ref";
	status = "okay";
};

&amp;amp;pcie {
	reset-gpio = &amp;lt;&amp;amp;pca9555 0 GPIO_ACTIVE_LOW&amp;gt;;
	clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_ROOT&amp;gt;,
		 &amp;lt;&amp;amp;clk IMX8MP_CLK_PCIE_ROOT&amp;gt;,
		 &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_AXI&amp;gt;;
	clock-names = "pcie", "pcie_aux", "pcie_bus";
	assigned-clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_PCIE_AUX&amp;gt;;
	assigned-clock-rates = &amp;lt;10000000&amp;gt;;
	assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MP_SYS_PLL2_50M&amp;gt;;
	status = "okay";
};

&amp;amp;pcie_ep {
	clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_ROOT&amp;gt;,
		 &amp;lt;&amp;amp;clk IMX8MP_CLK_PCIE_ROOT&amp;gt;,
		 &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_AXI&amp;gt;;
	clock-names = "pcie", "pcie_aux", "pcie_bus";
	assigned-clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_AXI&amp;gt;,
			  &amp;lt;&amp;amp;clk IMX8MP_CLK_PCIE_AUX&amp;gt;;
	assigned-clock-rates = &amp;lt;500000000&amp;gt;, &amp;lt;10000000&amp;gt;;
	assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MP_SYS_PLL2_500M&amp;gt;,
				 &amp;lt;&amp;amp;clk IMX8MP_SYS_PLL2_50M&amp;gt;;
	status = "disabled";
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;BR /&gt;Can someone point me out what is missing, please?&lt;BR /&gt;&lt;BR /&gt;Thank you!&lt;/P&gt;</description>
    <pubDate>Wed, 29 Nov 2023 14:41:24 GMT</pubDate>
    <dc:creator>Redman</dc:creator>
    <dc:date>2023-11-29T14:41:24Z</dc:date>
    <item>
      <title>Using PCIe on i.MX8MP with internal clock on Linux-imx 6.1.36</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-PCIe-on-i-MX8MP-with-internal-clock-on-Linux-imx-6-1-36/m-p/1765759#M216560</link>
      <description>&lt;P&gt;Hello everyone,&lt;/P&gt;&lt;P&gt;I'm trying to set up the dts to use the PCIe interface on a uSOM equipped with an i.MX8MP processor. I know for sure that the hardware is ok because I'm using the uSOM with a development board and everything is ok when using the linux-imx 5.15.32.&lt;BR /&gt;The problems arise when using the latest linux-imx 6.1.36: I get a " phy phy-32f00000.pcie-phy.2: phy poweron failed --&amp;gt; -110" in the dmesg, a symptom that the PCIe PHY is not being properly clocked.&lt;BR /&gt;&lt;BR /&gt;The dts fragment for the PCIe is the following:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;&amp;amp;pcie_phy {
	fsl,refclk-pad-mode = &amp;lt;IMX8_PCIE_REFCLK_PAD_UNUSED&amp;gt;;
	clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_AXI&amp;gt;;
	clock-names = "ref";
	status = "okay";
};

&amp;amp;pcie {
	reset-gpio = &amp;lt;&amp;amp;pca9555 0 GPIO_ACTIVE_LOW&amp;gt;;
	clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_ROOT&amp;gt;,
		 &amp;lt;&amp;amp;clk IMX8MP_CLK_PCIE_ROOT&amp;gt;,
		 &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_AXI&amp;gt;;
	clock-names = "pcie", "pcie_aux", "pcie_bus";
	assigned-clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_PCIE_AUX&amp;gt;;
	assigned-clock-rates = &amp;lt;10000000&amp;gt;;
	assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MP_SYS_PLL2_50M&amp;gt;;
	status = "okay";
};

&amp;amp;pcie_ep {
	clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_ROOT&amp;gt;,
		 &amp;lt;&amp;amp;clk IMX8MP_CLK_PCIE_ROOT&amp;gt;,
		 &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_AXI&amp;gt;;
	clock-names = "pcie", "pcie_aux", "pcie_bus";
	assigned-clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_AXI&amp;gt;,
			  &amp;lt;&amp;amp;clk IMX8MP_CLK_PCIE_AUX&amp;gt;;
	assigned-clock-rates = &amp;lt;500000000&amp;gt;, &amp;lt;10000000&amp;gt;;
	assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MP_SYS_PLL2_500M&amp;gt;,
				 &amp;lt;&amp;amp;clk IMX8MP_SYS_PLL2_50M&amp;gt;;
	status = "disabled";
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;BR /&gt;Can someone point me out what is missing, please?&lt;BR /&gt;&lt;BR /&gt;Thank you!&lt;/P&gt;</description>
      <pubDate>Wed, 29 Nov 2023 14:41:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-PCIe-on-i-MX8MP-with-internal-clock-on-Linux-imx-6-1-36/m-p/1765759#M216560</guid>
      <dc:creator>Redman</dc:creator>
      <dc:date>2023-11-29T14:41:24Z</dc:date>
    </item>
    <item>
      <title>Re: Using PCIe on i.MX8MP with internal clock on Linux-imx 6.1.36</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-PCIe-on-i-MX8MP-with-internal-clock-on-Linux-imx-6-1-36/m-p/1765830#M216569</link>
      <description>&lt;P&gt;Hello, I hope you are doing well.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;This issue was reported before, I will attach a working reference DTS and 4 patches that need to be applied.&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;pcie0_refclk: pcie0-refclk {
    compatible = "fixed-clock";
    #clock-cells = &amp;lt;0&amp;gt;;
    clock-frequency = &amp;lt;100000000&amp;gt;;
};

reg_pcie0: regulator-pcie {
    compatible = "regulator-fixed";
    regulator-name = "MPCIE_3V3";
    regulator-min-microvolt = &amp;lt;3300000&amp;gt;;
    regulator-max-microvolt = &amp;lt;3300000&amp;gt;;
    gpio = &amp;lt;&amp;amp;gpio2 6 GPIO_ACTIVE_HIGH&amp;gt;;
    enable-active-high;
    regulator-always-on;
};

&amp;amp;pcie_phy {
    fsl,refclk-pad-mode = &amp;lt;IMX8_PCIE_REFCLK_PAD_OUTPUT&amp;gt;;
    clocks = &amp;lt;&amp;amp;hsio_blk_ctrl&amp;gt;;
    clock-names = "ref";
    status = "okay";
};

&amp;amp;pcie {
    pinctrl-names = "default";
    pinctrl-0 = &amp;lt;&amp;amp;pinctrl_pcie0&amp;gt;;
    reset-gpio = &amp;lt;&amp;amp;gpio1 12 GPIO_ACTIVE_LOW&amp;gt;;
    clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_ROOT&amp;gt;,
    &amp;lt;&amp;amp;clk IMX8MP_CLK_PCIE_ROOT&amp;gt;,
    &amp;lt;&amp;amp;clk IMX8MP_CLK_HSIO_AXI&amp;gt;;
    clock-names = "pcie", "pcie_aux", "pcie_bus";
    assigned-clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_PCIE_AUX&amp;gt;;
    assigned-clock-rates = &amp;lt;10000000&amp;gt;;
    assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MP_SYS_PLL2_50M&amp;gt;;
    vpcie-supply = &amp;lt;&amp;amp;reg_pcie0&amp;gt;;
    status = "okay";
};
&lt;/LI-CODE&gt;
&lt;P&gt;Patches:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.spinics.net/lists/devicetree/msg558950.html" target="_blank"&gt;https://www.spinics.net/lists/devicetree/msg558950.html&lt;/A&gt;&amp;nbsp;&lt;BR /&gt;&lt;A href="https://www.spinics.net/lists/devicetree/msg558947.html" target="_blank"&gt;https://www.spinics.net/lists/devicetree/msg558947.html&lt;/A&gt;&amp;nbsp;&lt;BR /&gt;&lt;A href="https://www.spinics.net/lists/devicetree/msg558949.html" target="_blank"&gt;https://www.spinics.net/lists/devicetree/msg558949.html&lt;/A&gt;&amp;nbsp;&lt;BR /&gt;&lt;A href="https://www.spinics.net/lists/devicetree/msg558948.html" target="_blank"&gt;https://www.spinics.net/lists/devicetree/msg558948.html&lt;/A&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please let me know if helps with your issue.&lt;/P&gt;
&lt;P&gt;Best regards.&lt;/P&gt;</description>
      <pubDate>Wed, 29 Nov 2023 16:21:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-PCIe-on-i-MX8MP-with-internal-clock-on-Linux-imx-6-1-36/m-p/1765830#M216569</guid>
      <dc:creator>JorgeCas</dc:creator>
      <dc:date>2023-11-29T16:21:55Z</dc:date>
    </item>
    <item>
      <title>Re: Using PCIe on i.MX8MP with internal clock on Linux-imx 6.1.36</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-PCIe-on-i-MX8MP-with-internal-clock-on-Linux-imx-6-1-36/m-p/1767599#M216729</link>
      <description>&lt;P&gt;Hello!&lt;BR /&gt;Problem solved, thanks for your help!&lt;/P&gt;</description>
      <pubDate>Sat, 02 Dec 2023 13:19:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-PCIe-on-i-MX8MP-with-internal-clock-on-Linux-imx-6-1-36/m-p/1767599#M216729</guid>
      <dc:creator>Redman</dc:creator>
      <dc:date>2023-12-02T13:19:31Z</dc:date>
    </item>
    <item>
      <title>Re: Using PCIe on i.MX8MP with internal clock on Linux-imx 6.1.36</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-PCIe-on-i-MX8MP-with-internal-clock-on-Linux-imx-6-1-36/m-p/2030869#M233149</link>
      <description>&lt;P&gt;HI,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have the same issue when using the pcie as pcie_ep.&lt;/P&gt;&lt;P&gt;can you please add the relevant changes for this mode ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;</description>
      <pubDate>Mon, 20 Jan 2025 21:32:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-PCIe-on-i-MX8MP-with-internal-clock-on-Linux-imx-6-1-36/m-p/2030869#M233149</guid>
      <dc:creator>shlomz</dc:creator>
      <dc:date>2025-01-20T21:32:41Z</dc:date>
    </item>
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