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    <title>i.MX Processors中的主题 IMX8MP share DDR memory allocation</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-share-DDR-memory-allocation/m-p/1756253#M215618</link>
    <description>&lt;P&gt;Good afternoon.&lt;BR /&gt;I'm trying to implement the allocation of shared DDR memory between CortexM7 and CortexA53 for the IMX8MP processor. I'm using the Remote Core Share driver from the example "Low-Power Audio" - &lt;STRONG&gt;rmtcore_shm&lt;/STRONG&gt; (files in attachment). It is based on the standard memory allocation approach:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;buf_addr = dma_alloc_coherent(drvdata-&amp;gt;dev, buf_size, &amp;amp;phy_addr, GFP_KERNEL);&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;The driver also works with the buffer as a file descriptor - open, read, write, seek, ioctl and close operations.&lt;/P&gt;&lt;P&gt;I use "Toradex Reference multimedia image" and added this driver to the compilation of kernel modules. I also added changes to the DTS file:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;rmtcore_shm {&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;compatible = "fsl,rmtcore-shm";&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;status = "okay";&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;};&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;After starting the system, I see that the driver started without errors:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;[ 4.637647] RMTCORE module started!&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;[ OK ] Mounted 4.641354] RMTCORE_SHM device major: 508&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;Now I can work with the data buffer as a file descriptor, which is made available in &lt;EM&gt;/dev/rmtcore_shm&lt;/EM&gt;. I deduced the information available to me:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;unsigned long long buf_addr_phys = 0;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;unsigned long long buf_addr_virt = 0;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;unsigned long long set_buf_size = DDR_CMA_BUF_SIZE; // 4096&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;unsigned long long get_buf_size = 0;&lt;/EM&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;EM&gt;fdi = open(RMTCORE_SHM_DEV, O_RDWR);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;ioctl(fdi, RMTCORE_SHM_CHG_BUF_SIZE, &amp;amp;set_buf_size);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;ioctl(fdi, RMTCORE_SHM_GET_BUF_SIZE, &amp;amp;get_buf_size);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;ioctl(fdi, RMTCORE_SHM_GET_BUF_ADDR_PHY, &amp;amp;buf_addr_phys);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;ioctl(fdi, RMTCORE_SHM_GET_BUF_ADDR_VIRT, &amp;amp;buf_addr_virt);&lt;/EM&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;EM&gt;fprintf(stderr, "Set buffer size: 0x%llx\r\n", set_buf_size);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;fprintf(stderr, "Get buffer size: 0x%llx\r\n", get_buf_size);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;fprintf(stderr, "Phys address: 0x%llx\r\n", buf_addr_phys);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;fprintf(stderr, "Virtual address: 0x%llx\r\n", buf_addr_virt);&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;When I allocate a buffer size from &lt;STRONG&gt;1 to 4096&lt;/STRONG&gt; bytes everything works correctly and I can see the physical address of the available space:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;Set buffer size: 0x1000&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Get buffer size: 0x1000&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Phys address: 0x400aa000&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Virtual address: 0xffff80000a132000&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;But when I exceed the buffer size of 4096 (&lt;STRONG&gt;4097&lt;/STRONG&gt;) I get an invalid physical address that is out of scope of CortexM (similar to the spare address scope):&lt;/P&gt;&lt;P&gt;&lt;EM&gt;Set buffer size: 0x1001&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Get buffer size: 0x1001&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Phys address: &lt;STRONG&gt;0xee290000&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Virtual address: 0xffff80000a237000&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;Please tell me what could be the reason?&lt;/P&gt;&lt;P&gt;I also paid attention to the information when starting the system:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;As far as I understand, this applies to all memory allocations for DMA, i.e. and for &lt;EM&gt;dma_alloc_coherent()&lt;/EM&gt; in particular. The rmtcore_shm driver used allocates a predefined buffer size when opening a handle - &lt;EM&gt;RMTCORE_SHARE_MEM_DEFAULT_SIZE = (1 * 1024 * 1024) = 1MB&lt;/EM&gt;. I assumed that this might be the problem and reduced this size to &lt;EM&gt;256 kb&lt;/EM&gt; and recompiled the image. But this did not solve the problem.&lt;/P&gt;&lt;P&gt;The question also arose, where can I change the value for &lt;EM&gt;“DMA: preallocated 512 KiB GFP_KERNEL”&lt;/EM&gt; since I need to allocate &lt;STRONG&gt;16 MB&lt;/STRONG&gt; inside the CMA area using dma_alloc_coherent().&lt;/P&gt;&lt;P&gt;Thank you in advance for your time and help.&lt;/P&gt;&lt;P&gt;Regards, Stanislav.&lt;/P&gt;</description>
    <pubDate>Mon, 13 Nov 2023 11:46:42 GMT</pubDate>
    <dc:creator>Stan88</dc:creator>
    <dc:date>2023-11-13T11:46:42Z</dc:date>
    <item>
      <title>IMX8MP share DDR memory allocation</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-share-DDR-memory-allocation/m-p/1756253#M215618</link>
      <description>&lt;P&gt;Good afternoon.&lt;BR /&gt;I'm trying to implement the allocation of shared DDR memory between CortexM7 and CortexA53 for the IMX8MP processor. I'm using the Remote Core Share driver from the example "Low-Power Audio" - &lt;STRONG&gt;rmtcore_shm&lt;/STRONG&gt; (files in attachment). It is based on the standard memory allocation approach:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;buf_addr = dma_alloc_coherent(drvdata-&amp;gt;dev, buf_size, &amp;amp;phy_addr, GFP_KERNEL);&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;The driver also works with the buffer as a file descriptor - open, read, write, seek, ioctl and close operations.&lt;/P&gt;&lt;P&gt;I use "Toradex Reference multimedia image" and added this driver to the compilation of kernel modules. I also added changes to the DTS file:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;rmtcore_shm {&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;compatible = "fsl,rmtcore-shm";&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;status = "okay";&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;};&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;After starting the system, I see that the driver started without errors:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;[ 4.637647] RMTCORE module started!&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;[ OK ] Mounted 4.641354] RMTCORE_SHM device major: 508&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;Now I can work with the data buffer as a file descriptor, which is made available in &lt;EM&gt;/dev/rmtcore_shm&lt;/EM&gt;. I deduced the information available to me:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;unsigned long long buf_addr_phys = 0;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;unsigned long long buf_addr_virt = 0;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;unsigned long long set_buf_size = DDR_CMA_BUF_SIZE; // 4096&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;unsigned long long get_buf_size = 0;&lt;/EM&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;EM&gt;fdi = open(RMTCORE_SHM_DEV, O_RDWR);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;ioctl(fdi, RMTCORE_SHM_CHG_BUF_SIZE, &amp;amp;set_buf_size);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;ioctl(fdi, RMTCORE_SHM_GET_BUF_SIZE, &amp;amp;get_buf_size);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;ioctl(fdi, RMTCORE_SHM_GET_BUF_ADDR_PHY, &amp;amp;buf_addr_phys);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;ioctl(fdi, RMTCORE_SHM_GET_BUF_ADDR_VIRT, &amp;amp;buf_addr_virt);&lt;/EM&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;EM&gt;fprintf(stderr, "Set buffer size: 0x%llx\r\n", set_buf_size);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;fprintf(stderr, "Get buffer size: 0x%llx\r\n", get_buf_size);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;fprintf(stderr, "Phys address: 0x%llx\r\n", buf_addr_phys);&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;fprintf(stderr, "Virtual address: 0x%llx\r\n", buf_addr_virt);&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;When I allocate a buffer size from &lt;STRONG&gt;1 to 4096&lt;/STRONG&gt; bytes everything works correctly and I can see the physical address of the available space:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;Set buffer size: 0x1000&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Get buffer size: 0x1000&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Phys address: 0x400aa000&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Virtual address: 0xffff80000a132000&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;But when I exceed the buffer size of 4096 (&lt;STRONG&gt;4097&lt;/STRONG&gt;) I get an invalid physical address that is out of scope of CortexM (similar to the spare address scope):&lt;/P&gt;&lt;P&gt;&lt;EM&gt;Set buffer size: 0x1001&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Get buffer size: 0x1001&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Phys address: &lt;STRONG&gt;0xee290000&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Virtual address: 0xffff80000a237000&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;Please tell me what could be the reason?&lt;/P&gt;&lt;P&gt;I also paid attention to the information when starting the system:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;As far as I understand, this applies to all memory allocations for DMA, i.e. and for &lt;EM&gt;dma_alloc_coherent()&lt;/EM&gt; in particular. The rmtcore_shm driver used allocates a predefined buffer size when opening a handle - &lt;EM&gt;RMTCORE_SHARE_MEM_DEFAULT_SIZE = (1 * 1024 * 1024) = 1MB&lt;/EM&gt;. I assumed that this might be the problem and reduced this size to &lt;EM&gt;256 kb&lt;/EM&gt; and recompiled the image. But this did not solve the problem.&lt;/P&gt;&lt;P&gt;The question also arose, where can I change the value for &lt;EM&gt;“DMA: preallocated 512 KiB GFP_KERNEL”&lt;/EM&gt; since I need to allocate &lt;STRONG&gt;16 MB&lt;/STRONG&gt; inside the CMA area using dma_alloc_coherent().&lt;/P&gt;&lt;P&gt;Thank you in advance for your time and help.&lt;/P&gt;&lt;P&gt;Regards, Stanislav.&lt;/P&gt;</description>
      <pubDate>Mon, 13 Nov 2023 11:46:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-share-DDR-memory-allocation/m-p/1756253#M215618</guid>
      <dc:creator>Stan88</dc:creator>
      <dc:date>2023-11-13T11:46:42Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP share DDR memory allocation</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-share-DDR-memory-allocation/m-p/1756369#M215632</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;You need change the CMA value on uboot.&lt;/P&gt;
&lt;P&gt;Seems issue is caused by memory errors. One can run ddr test with RPA tool and update&lt;/P&gt;
&lt;P&gt;image as described in MX8_DDR_Tool_User_Guide, included in ddr test package&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8-8X-Family-DDR-Tools-Release/ta-p/1121519" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8-8X-Family-DDR-Tools-Release/ta-p/...&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Mon, 13 Nov 2023 15:51:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-share-DDR-memory-allocation/m-p/1756369#M215632</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2023-11-13T15:51:23Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP share DDR memory allocation</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-share-DDR-memory-allocation/m-p/1756463#M215643</link>
      <description>Thank you for the answer.&lt;BR /&gt;&lt;BR /&gt;Could you tell me what the value for CMA I need to change on u-boot?</description>
      <pubDate>Mon, 13 Nov 2023 19:06:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-share-DDR-memory-allocation/m-p/1756463#M215643</guid>
      <dc:creator>Stan88</dc:creator>
      <dc:date>2023-11-13T19:06:53Z</dc:date>
    </item>
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