topic Re: What can I do with FlexSPI? in i.MX Processors

What can I do with FlexSPI?

rdr3e — Mon, 06 Nov 2023 18:30:35 GMT

Hi, I'm wondering what makes the difference between FlexSPI and a traditional SPI controller.

From what I understand, the FlexSPI automatically creates transactions on the SPI bus, depending on the LUT configuration that is programmed by a driver.

I've read that this driver is designed to work mainly with SPI memories like SPI NOR memory but would also work e.g. with FPGA devices.

As I understand the typical write transaction on the SPI bus triggered by FlexSPI (when communicating with SPI NOR Flash) would look like this:
[ 1 byte: CMD ] [ 2-3 bytes ADDR] [ opt: DUMMY ] [ DATA ]

However, I would like to use this FlexSPI to communicate with something different than SPI memory, namely Hilsher netX90.

The problem is that the netX90 expects a slightly different protocol which basically looks like this (write registers):

[ 1 byte CMD ] [ 2 bytes ADDR ] [ DATA ] *

Can I configure FlexSPI to send data in this format?

As the name (Flex) suggests it should be possible but I'm still not sure.

I would appreciate any information that will help me to understand how it works.

* In fact the protocol is a bit different:

[ 1 byte CMD + part of ADDR(4 bits) ] [ 2 bytes: ADDR ] [ DATA ]

but I think I would be able to encode part of the address (4 bits) in the CMD.

Re: What can I do with FlexSPI?

rdr3e — Tue, 07 Nov 2023 08:58:32 GMT

Re: What can I do with FlexSPI?

Bio_TICFSL — Tue, 07 Nov 2023 14:47:49 GMT

Hello,

You will have to change the flex spi current driver to support this fpga.

Regards

Re: What can I do with FlexSPI?

rdr3e — Tue, 07 Nov 2023 14:55:59 GMT

What exactly?
The problem is that I need to use this FlexSPI to communicate with SPI NOR Flash and my FPGA.

Usually, when we want to save sth on SPI NOR Flash, the transaction on the SPI bus looks as follows:
[ 1 byte CMD ] [ 3-4 bytes ADDR ] [ n bytes opt dummy] [ n bytes DATA ]

My FPGA expects data in the following format:
[ 1 byte CMD ] [ 2 bytes ADDR ] [ n bytes DATA ]

Does this driver support something like this?
If not - what's the purpose of e.g. op->addr.nbytes ?

My question is as follows: can I configure the current FlexSPI driver, by using opcodes prepared by my driver to issue a transaction on the bus in the following format:
[ 1 byte CMD ] [ 2 bytes ADDR ] [ n bytes DATA ]
?
If not, what's the flex part in the current driver when it's not flexible enough to work with different devices than flash memory?