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    <title>i.MX ProcessorsのトピックRe: IMX8MQ M4 core default GPIOs</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MQ-M4-core-default-GPIOs/m-p/1742940#M214432</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/197174"&gt;@Saravanans1&lt;/a&gt;,&lt;/P&gt;
&lt;DIV&gt;I hope you are doing well&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;To configure the peripheral for the M4 core, one can use the RDC. Please refer to&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;U&gt;section 3.2 Resource Domain Controller (RDC)&lt;/U&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;from the Reference Manual&amp;nbsp;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX8MDQLQRM" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://www.nxp.com/webapp/Download?colCode%3DIMX8MDQLQRM&amp;amp;source=gmail&amp;amp;ust=1697806150869000&amp;amp;usg=AOvVaw2WFQ-A7amOC7bRsWy1pjyb"&gt;IMX8MDQLQRM&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;for more information.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;By default, UART2 is configured for the M4 core as mentioned in the&amp;nbsp;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX8MEVKBHUG" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://www.nxp.com/webapp/Download?colCode%3DIMX8MEVKBHUG&amp;amp;source=gmail&amp;amp;ust=1697806150869000&amp;amp;usg=AOvVaw0eB1S2BxilIUN8Lm-pec7j"&gt;i.MX 8M EVK Board Hardware User's Guide&lt;/A&gt;, section&amp;nbsp;2.10. UART connector (J1701).&lt;/DIV&gt;
&lt;DIV&gt;"On the EVK board, UART1_TXD &amp;amp; UART1_RXD are used to output serial debugging information for&lt;BR /&gt;A53-core. UART2_TXD &amp;amp; UART2_RXD are used to output serial debugging information for M4-core."&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Thanks &amp;amp; Regards,&lt;/DIV&gt;
&lt;DIV&gt;Dhruvit Vasavada&lt;/DIV&gt;</description>
    <pubDate>Thu, 19 Oct 2023 12:58:24 GMT</pubDate>
    <dc:creator>Dhruvit</dc:creator>
    <dc:date>2023-10-19T12:58:24Z</dc:date>
    <item>
      <title>IMX8MQ M4 core default GPIOs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MQ-M4-core-default-GPIOs/m-p/1741961#M214253</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Are any default GPIOs available for IMx8MQ in the M4 core test? If it is there can you provide the list of GPIOs in the M4 core? and also provide the which UART we can test for M4 core&lt;/P&gt;</description>
      <pubDate>Wed, 18 Oct 2023 09:52:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MQ-M4-core-default-GPIOs/m-p/1741961#M214253</guid>
      <dc:creator>Saravanans1</dc:creator>
      <dc:date>2023-10-18T09:52:46Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MQ M4 core default GPIOs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MQ-M4-core-default-GPIOs/m-p/1742940#M214432</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/197174"&gt;@Saravanans1&lt;/a&gt;,&lt;/P&gt;
&lt;DIV&gt;I hope you are doing well&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;To configure the peripheral for the M4 core, one can use the RDC. Please refer to&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;U&gt;section 3.2 Resource Domain Controller (RDC)&lt;/U&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;from the Reference Manual&amp;nbsp;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX8MDQLQRM" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://www.nxp.com/webapp/Download?colCode%3DIMX8MDQLQRM&amp;amp;source=gmail&amp;amp;ust=1697806150869000&amp;amp;usg=AOvVaw2WFQ-A7amOC7bRsWy1pjyb"&gt;IMX8MDQLQRM&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;for more information.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;By default, UART2 is configured for the M4 core as mentioned in the&amp;nbsp;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX8MEVKBHUG" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://www.nxp.com/webapp/Download?colCode%3DIMX8MEVKBHUG&amp;amp;source=gmail&amp;amp;ust=1697806150869000&amp;amp;usg=AOvVaw0eB1S2BxilIUN8Lm-pec7j"&gt;i.MX 8M EVK Board Hardware User's Guide&lt;/A&gt;, section&amp;nbsp;2.10. UART connector (J1701).&lt;/DIV&gt;
&lt;DIV&gt;"On the EVK board, UART1_TXD &amp;amp; UART1_RXD are used to output serial debugging information for&lt;BR /&gt;A53-core. UART2_TXD &amp;amp; UART2_RXD are used to output serial debugging information for M4-core."&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Thanks &amp;amp; Regards,&lt;/DIV&gt;
&lt;DIV&gt;Dhruvit Vasavada&lt;/DIV&gt;</description>
      <pubDate>Thu, 19 Oct 2023 12:58:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MQ-M4-core-default-GPIOs/m-p/1742940#M214432</guid>
      <dc:creator>Dhruvit</dc:creator>
      <dc:date>2023-10-19T12:58:24Z</dc:date>
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