IMX8MP and TC358743

David24 — Wed, 11 Oct 2023 11:24:12 GMT

Hi,

I need to connect Toshiba TC358743 HDMI to CSI bridge to IMX8M Plus. I use Nitrogen 8M Plus module (Boundary devices) and their carrier board. NIT8MP_EVK. TC358743 is connected to csi1 and doesn't work, no frames captured. Basler camera is connected to csi0 and works well. Boundary Yocto kirkstone-5.15.71-2.2.0 Linux.

My .dts is attached.

root@nitrogen8mp:~# media-ctl -p
Media controller API version 5.15.71

Media device information
------------------------
driver mxc-md
model FSL Capture Media Device
serial
bus info
hw revision 0x0
driver version 5.15.71

Device topology
- entity 1: mxc_isi.1 (16 pads, 2 links)
type V4L2 subdev subtype Unknown flags 0
pad0: Sink
pad1: Sink
pad2: Sink
pad3: Sink
pad4: Sink
<- "mxc-mipi-csi2.1":4 [ENABLED]
pad5: Sink
pad6: Sink
pad7: Sink
pad8: Sink
pad9: Sink
pad10: Sink
pad11: Sink
pad12: Source
-> "mxc_isi.1.capture":0 [ENABLED]
pad13: Source
pad14: Source
pad15: Sink

- entity 18: mxc_isi.1.capture (1 pad, 1 link)
type Node subtype V4L flags 0
device node name /dev/video2
pad0: Sink
<- "mxc_isi.1":12 [ENABLED]

- entity 22: mxc-mipi-csi2.0 (8 pads, 1 link)
type Node subtype V4L flags 0
device node name /dev/v4l-subdev0
pad0: Sink
<- "basler-camera-vvcam 7-0036":0 [ENABLED,IMMUTABLE]
pad1: Sink
pad2: Sink
pad3: Sink
pad4: Source
pad5: Source
pad6: Source
pad7: Source

- entity 31: mxc-mipi-csi2.1 (8 pads, 2 links)
type Node subtype V4L flags 0
device node name /dev/v4l-subdev1
pad0: Sink
<- "tc358743 8-000f":0 [ENABLED,IMMUTABLE]
pad1: Sink
pad2: Sink
pad3: Sink
pad4: Source
-> "mxc_isi.1":4 [ENABLED]
pad5: Source
pad6: Source
pad7: Source

- entity 40: basler-camera-vvcam 7-0036 (1 pad, 1 link)
type V4L2 subdev subtype Sensor flags 0
device node name /dev/v4l-subdev2
pad0: Source
-> "mxc-mipi-csi2.0":0 [ENABLED,IMMUTABLE]

- entity 42: tc358743 8-000f (1 pad, 1 link)
type V4L2 subdev subtype Unknown flags 0
device node name /dev/v4l-subdev3
pad0: Source
[fmt:UYVY8_2X8/1280x720 field:none colorspace:smpte170m]
[dv.caps:BT.656/1120 min:640x350@13000000 max:1920x1200@165000000 stds:CEA-861,DMT,CVT,GTF caps:progressive,reduced-blanking,custom]
[dv.detect:BT.656/1120 1280x720p60 (1650x750) stds: flags:]
[dv.current:BT.656/1120 1280x720p60 (1650x750) stds: flags:]
-> "mxc-mipi-csi2.1":0 [ENABLED,IMMUTABLE]

status of TC358743:

[ 8320.421906] tc358743 8-000f: -----Chip status-----
[ 8320.427589] tc358743 8-000f: Chip ID: 0x00
[ 8320.432509] tc358743 8-000f: Chip revision: 0x00
[ 8320.437141] tc358743 8-000f: Reset: IR: 1, CEC: 0, CSI TX: 0, HDMI: 0
[ 8320.443607] tc358743 8-000f: Sleep mode: off
[ 8320.447892] tc358743 8-000f: Cable detected (+5V power): yes
[ 8320.454300] tc358743 8-000f: DDC lines enabled: yes
[ 8320.459940] tc358743 8-000f: Hotplug enabled: yes
[ 8320.465466] tc358743 8-000f: CEC enabled: no
[ 8320.469741] tc358743 8-000f: -----Signal status-----
[ 8320.474714] tc358743 8-000f: TMDS signal detected: yes
[ 8320.479858] tc358743 8-000f: Stable sync signal: yes
[ 8320.484828] tc358743 8-000f: PHY PLL locked: yes
[ 8320.489452] tc358743 8-000f: PHY DE detected: yes
[ 8320.503359] tc358743 8-000f: Detected format: 1280x720p60.00 (1650x750)
[ 8320.510039] tc358743 8-000f: horizontal: fp = 0, -sync = 370, bp = 0
[ 8320.516420] tc358743 8-000f: vertical: fp = 0, -sync = 30, bp = 0
[ 8320.522536] tc358743 8-000f: pixelclock: 74250000
[ 8320.527259] tc358743 8-000f: flags (0x0):
[ 8320.531287] tc358743 8-000f: standards (0x0):
[ 8320.535657] tc358743 8-000f: Configured format: 1280x720p60.00 (1650x750)
[ 8320.542452] tc358743 8-000f: horizontal: fp = 0, -sync = 370, bp = 0
[ 8320.548812] tc358743 8-000f: vertical: fp = 0, -sync = 30, bp = 0
[ 8320.554910] tc358743 8-000f: pixelclock: 74250000
[ 8320.559620] tc358743 8-000f: flags (0x0):
[ 8320.563637] tc358743 8-000f: standards (0x0):
[ 8320.567999] tc358743 8-000f: -----CSI-TX status-----
[ 8320.572969] tc358743 8-000f: Lanes needed: 2
[ 8320.577243] tc358743 8-000f: Lanes in use: 2
[ 8320.582334] tc358743 8-000f: Waiting for particular sync signal: no
[ 8320.589428] tc358743 8-000f: Transmit mode: yes
[ 8320.594769] tc358743 8-000f: Receive mode: no
[ 8320.599945] tc358743 8-000f: Stopped: no
[ 8320.603880] tc358743 8-000f: Color space: YCbCr 422 2x8-bit
[ 8320.610172] tc358743 8-000f: -----DVI-D status-----
[ 8320.615063] tc358743 8-000f: HDCP encrypted content: no
[ 8320.620298] tc358743 8-000f: Input color space: RGB full range

CSI registers:

[ 330.076909] mxc-mipi-csi2.1: --- mipi_csis_s_stream ---
[ 330.076916] mxc-mipi-csi2.1: CSIS_VERSION[0]: 0x03060301
[ 330.076922] mxc-mipi-csi2.1: CSIS_CMN_CTRL[4]: 0x00004905
[ 330.076927] mxc-mipi-csi2.1: CSIS_CLK_CTRL[8]: 0x000f0000
[ 330.076933] mxc-mipi-csi2.1: CSIS_INTMSK[10]: 0x0fffff1f
[ 330.076940] mxc-mipi-csi2.1: CSIS_INTSRC[14]: 0x00000000
[ 330.076946] mxc-mipi-csi2.1: CSIS_DPHYSTATUS[20]: 0x000000c2
[ 330.076951] mxc-mipi-csi2.1: CSIS_DPHYCTRL[24]: 0x06000007
[ 330.076958] mxc-mipi-csi2.1: CSIS_DPHYBCTRL_L[30]: 0x000001f4
[ 330.076964] mxc-mipi-csi2.1: CSIS_DPHYBCTRL_H[34]: 0x00000000
[ 330.076969] mxc-mipi-csi2.1: CSIS_DPHYSCTRL_L[38]: 0x00000000
[ 330.076975] mxc-mipi-csi2.1: CSIS_DPHYSCTRL_H[3c]: 0x00000000
[ 330.076980] mxc-mipi-csi2.1: CSIS_ISPCONFIG_CH0[40]: 0x00001078
[ 330.076985] mxc-mipi-csi2.1: CSIS_ISPCONFIG_CH1[50]: 0x000008fd
[ 330.076992] mxc-mipi-csi2.1: CSIS_ISPCONFIG_CH2[60]: 0x000008fe
[ 330.076997] mxc-mipi-csi2.1: CSIS_ISPCONFIG_CH3[70]: 0x000008ff
[ 330.077002] mxc-mipi-csi2.1: CSIS_ISPRESOL_CH0[44]: 0x02d00500
[ 330.077009] mxc-mipi-csi2.1: CSIS_ISPRESOL_CH1[54]: 0x80008000
[ 330.077015] mxc-mipi-csi2.1: CSIS_ISPRESOL_CH2[64]: 0x80008000
[ 330.077020] mxc-mipi-csi2.1: CSIS_ISPRESOL_CH3[74]: 0x80008000
[ 330.077025] mxc-mipi-csi2.1: CSIS_ISPSYNC_CH0[48]: 0x00000000
[ 330.077030] mxc-mipi-csi2.1: CSIS_ISPSYNC_CH1[58]: 0x00000000
[ 330.077037] mxc-mipi-csi2.1: CSIS_ISPSYNC_CH2[68]: 0x00000000
[ 330.077043] mxc-mipi-csi2.1: CSIS_ISPSYNC_CH3[78]: 0x00000000
[ 330.077050] mxc-mipi-csi2.1: --- mipi_csis_s_stream ---
[ 330.077054] mxc-mipi-csi2.1: GPR_GASKET_0_CTRL[60]: 0xffff8000
[ 330.077059] mxc-mipi-csi2.1: GPR_GASKET_0_HSIZE[64]: 0xffff8000
[ 330.077064] mxc-mipi-csi2.1: GPR_GASKET_0_VSIZE[68]: 0xffff8000

It seems like a clock lane is stopped and in ULPS. I don't know why. HS-settle and CLK-settle should be correct. Data lanes are alive. I checked it by an oscilloscope. Could anybody help, please?

David

Re: IMX8MP and TC358743

Bio_TICFSL — Wed, 11 Oct 2023 14:36:33 GMT

Hello,

You may have added the driver for it since M8MP does not have the driver for it, maybe @boundary can help

Regards

Re: IMX8MP and TC358743

David24 — Thu, 12 Oct 2023 10:20:32 GMT

Hello,

TC358743 driver is part of Boundary system image.

Re: IMX8MP and TC358743

David24 — Fri, 13 Oct 2023 07:51:25 GMT

The driver mentioned above seems to work. I think the problem is in the ISI module. I don't know if it needs to be configured somehow.

Re: IMX8MP and TC358743

gary_bisson — Thu, 19 Oct 2023 09:44:05 GMT

Hi,

There's already a device tree for TC358743:

https://github.com/boundarydevices/linux/blob/boundary-imx_6.1.y/arch/arm64/boot/dts/freescale/imx8mp-nitrogen8mp-enc-tc358743.dts

Note that you can only connect our TC358743 daughter to the ENC carrier which is tied to CSI1.

The EVK carrier only includes Basler-compliant connectors.

Regards,

Gary

Re: IMX8MP and TC358743

David24 — Thu, 19 Oct 2023 10:54:24 GMT

Hi Gary,

Thank you for your answer.

I made a connection board between EVK carrier and TC358743 daughter board, so I can use the Basler-compliant connector. IRQ and Reset is connected via J31 connector of EVK carrier board (pins 17 and 19).

I used the .dts file for ENC carrier which you mentioned as a template.

Regards,

David

Re: IMX8MP and TC358743

David24 — Tue, 14 Nov 2023 09:32:41 GMT

A problem is in a function enable_stream() in tc358743.c. IMX8M Plus CSI2 DPHY needs non-continuous clock or at least one transition LP11->HS at the beginning of stream. TC358743 is initialized according to device tree settings (clock non-continuous) and then the function changes the clock settings to continuous. It tries to do the LP11->HS transition but a receiver doesn't get it and clock lane stays in stop state. Solution is to remove a part of a code which does the transition (i2c_wr32(sd, TXOPTIONCNTRL, 0); i2c_wr32(sd, TXOPTIONCNTRL, MASK_CONTCLKMODE);).

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