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    <title>topic Re: Set JTAG TAP (MCIMX6D) in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1727219#M212954</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;The schematic look ok, but i mean physically anyway o guess you have to do a boundary scan.&lt;/P&gt;
&lt;P&gt;regards&lt;/P&gt;</description>
    <pubDate>Thu, 21 Sep 2023 14:47:50 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2023-09-21T14:47:50Z</dc:date>
    <item>
      <title>Set JTAG TAP (MCIMX6D)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1725710#M212807</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;We have a custom board with a&amp;nbsp;&lt;SPAN&gt;MCIMX6D7CZK08AD. We are trying to connect JTAG using a&amp;nbsp;Segger J-Link PLUS Compact and&amp;nbsp;Segger 10-Pin Needle Adapter, to the&amp;nbsp;10pin TAG CONNECT pattern on our PCB. We have checked the pins and everything seems to be connected correctly.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;We are experiencing the following error when trying to connect with JTAG (extended log attached):&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;TD764 009:716.779 TotalIRLen = 5, IRPrint = 0x01&lt;BR /&gt;TD764 009:717.421 JTAG chain detection found 1 devices:&lt;BR /&gt;TD764 009:717.573 #0 Id: 0x2191E01D, IRLen: 05, Unknown device&lt;BR /&gt;TD764 009:717.640&lt;BR /&gt;***** Error:&lt;BR /&gt;TD764 009:717.647 CPU-TAP not found in JTAG chain&lt;BR /&gt;TD764 009:717.656 - 222.715ms returns 0xFFFFFEFB&lt;BR /&gt;TD694 524:514.144 JLINK_GetHWInfo(...)&lt;BR /&gt;TD694 524:514.560 - 0.380ms returns 0&lt;BR /&gt;TD5B0 525:015.104 JLINK_GetHWInfo(...)&lt;BR /&gt;&lt;BR /&gt;TD5B0 525:015.392 - 0.295ms returns 0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Segger support is saying: "The chip is in some kind of special mode (boundary scan, ...) where not the DAP-TAP (IRLen = 4) is visible on the JTAG chain but another TAP (IRLen = 5)"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(Segger forum link here:&amp;nbsp;&lt;A href="https://forum.segger.com/index.php/Thread/9223-Cannot-connect-to-target-CPU-TAP-not-found-in-JTAG-chain/" target="_blank"&gt;https://forum.segger.com/index.php/Thread/9223-Cannot-connect-to-target-CPU-TAP-not-found-in-JTAG-chain/&lt;/A&gt;)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;How do we adjust the TAP?&lt;/P&gt;</description>
      <pubDate>Tue, 19 Sep 2023 18:42:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1725710#M212807</guid>
      <dc:creator>CameraDeveloper</dc:creator>
      <dc:date>2023-09-19T18:42:53Z</dc:date>
    </item>
    <item>
      <title>Re: Set JTAG TAP (MCIMX6D)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1726410#M212883</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Is probably that the quality of signal is weak, because you are receiving an ID / IRLen unknown device.&amp;nbsp; Here is an application note on data scan boundaries is for mxRT but can apply to iMX6.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN12919.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN12919.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Wed, 20 Sep 2023 14:45:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1726410#M212883</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2023-09-20T14:45:06Z</dc:date>
    </item>
    <item>
      <title>Re: Set JTAG TAP (MCIMX6D)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1726493#M212890</link>
      <description>&lt;P&gt;The signal flow is out of the IMX6D chip, down the DF40 mezzanine stack, then out to the tag connect pins.&lt;/P&gt;&lt;P&gt;We don't know what would make the signal weak. See wiring diagram between IMX6 and JTAG attached for reference.&lt;/P&gt;</description>
      <pubDate>Wed, 20 Sep 2023 18:35:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1726493#M212890</guid>
      <dc:creator>CameraDeveloper</dc:creator>
      <dc:date>2023-09-20T18:35:29Z</dc:date>
    </item>
    <item>
      <title>Re: Set JTAG TAP (MCIMX6D)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1727219#M212954</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;The schematic look ok, but i mean physically anyway o guess you have to do a boundary scan.&lt;/P&gt;
&lt;P&gt;regards&lt;/P&gt;</description>
      <pubDate>Thu, 21 Sep 2023 14:47:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1727219#M212954</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2023-09-21T14:47:50Z</dc:date>
    </item>
    <item>
      <title>Re: Set JTAG TAP (MCIMX6D)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1728556#M213078</link>
      <description>&lt;P&gt;Problem was resolved.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We needed to connect JTAG_MOD to ground, and disconnect the reset (pin10) on J-Link jtag.&lt;/P&gt;</description>
      <pubDate>Mon, 25 Sep 2023 05:53:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Set-JTAG-TAP-MCIMX6D/m-p/1728556#M213078</guid>
      <dc:creator>CameraDeveloper</dc:creator>
      <dc:date>2023-09-25T05:53:53Z</dc:date>
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