IMX8MP: LVDS Drive strength control

yogeshbsa89 — Thu, 21 Sep 2023 05:23:09 GMT

Hi NXP Community,

We are facing emission issues in IMX8MP from the Custom Lvds based display. by reducing pixel clock frequency to lower value (from 71 Mhz to 47 Mhz), it is improving to the Marginal level.

But it reduces frame rate as well. it is not so desired .

Now we are thinking alternative solution to control the emission by controlling LVDS drive strength.

Could you help in controlling LVDS drive strength. we are using 5.15 Linux Kernel.

How we can we check current drive strength of lvds signals ?

we have also found LVDS_CTRL register in Reference manual where we modified CC_ADJ value .

but its physical significance is not mentioned in the Manual.

if you can provide the current values from the value 0 to 7 it will be helpful to understand.

However we did find find any changes in Vpk to pk values after changing CC_ADJ value in LVDS_CTRL register .

phy_write(phy, LVDS_CTRL,
CC_ADJ(0x2) | PRE_EMPH_EN | PRE_EMPH_ADJ(0x3));

phy_write(phy, LVDS_CTRL,
CC_ADJ(0x7) | PRE_EMPH_EN | PRE_EMPH_ADJ(0x3));

Are we missing anything?

Regards,

Yogesh

topic IMX8MP: LVDS Drive strength control in i.MX Processors

IMX8MP: LVDS Drive strength control