https://community.nxp.com/t5/i-MX-Processors/Config-PWM/m-p/1722011#M212538 <P>Hi NXP,</P><P>How to configure 7 and 4 pins to output PWM signals respectively? [i.MX RT 1020 ]</P> Wed, 13 Sep 2023 11:30:56 GMT IanBrand 2023-09-13T11:30:56Z https://community.nxp.com/t5/i-MX-Processors/Config-PWM/m-p/1722011#M212538 <P>Hi NXP,</P><P>How to configure 7 and 4 pins to output PWM signals respectively? [i.MX RT 1020 ]</P> Wed, 13 Sep 2023 11:30:56 GMT https://community.nxp.com/t5/i-MX-Processors/Config-PWM/m-p/1722011#M212538 IanBrand 2023-09-13T11:30:56Z https://community.nxp.com/t5/i-MX-Processors/Config-PWM/m-p/1724964#M212756 <P>Hi,</P> <P>Thank you so much for your interest in our products and for using our community.</P> <P>That pins corresponds to <EM>PWM_X</EM> signals, which can output a third PWM signal from each submodule. However, the SDK does not include support for <EM>PWM_X</EM> functionality other than input capture.</P> <P>If you refer to the <EM>50.3.2.4 PWM Generation</EM> section of reference manual, the <EM>VAL0</EM> and <EM>VAL1</EM> comparators can be used to set frequency and duty cycle, based on the incoming clock to the counter.</P> <P>Hope it helps you.</P> <P>Have a nice day!</P> Mon, 18 Sep 2023 21:01:44 GMT https://community.nxp.com/t5/i-MX-Processors/Config-PWM/m-p/1724964#M212756 _Leo_ 2023-09-18T21:01:44Z