i.MX ProcessorsのトピックRe: i.MX8ULP CPU Rev. A2 Boot failed

i.MX8ULP CPU Rev. A2 Boot failed

wenxue_guo — Thu, 24 Aug 2023 10:17:56 GMT

Hi all,

We are development our MaaXBoard-8ULP demo board based on i.MX8ULP (CPU version A0.1) in the past days, all have done and works fine. But I find the lastes CPU version changes to version A2 when do mass production.

When I try to flash the old demo image to i.MX8ULL, it failed on uuu.exe for bootloader can not boot up.

I know the sentinel and upower firmware for i.MX8ULP is different for different CPU reversion. Then I try to download the latest firmware and found that sentinel-0.10 can support CPU Rev. A2 but upower-1.2.0 don't support it.

Then I try to use the latest upower_a1.bin and mx8ulpa2-ahab-container.img firmware to build new bootloader.

The u-boot can flash ok and bootup, but it failed for "M33 Sync: Timeout, Boot Stop!"

Our u-boot version is lf-6.1.1-1.0.0 and Cortex-M33 SDK version is SDK_v2.13.1_EVK-MIMX8ULP, can any one give me some guides on it ?

Re: i.MX8ULP CPU Rev. A2 Boot failed

Sanket_Parekh — Fri, 25 Aug 2023 05:54:58 GMT

Hi @wenxue_guo ,

I hope you are doing well.

This issue seems to be due to M33 not synching with U-boot.

Can you please clarify which M33 binary you have used?

There is an updated version of MCUExpressoSDK for i.MX8ULP is available.

(SDK_2_14_0_EVK-MIMX8ULP).

Please try with it.

Please make a note that all SDK demos can not work with Uboot.

main function in SDK should call BOARD_HandshakeWithUboot() to work with u-boot.

Thanks & Regards,
Sanket Parekh

Re: i.MX8ULP CPU Rev. A2 Boot failed

wenxue_guo — Mon, 28 Aug 2023 10:19:11 GMT

Hi @Sanket_Parekh

Thaks for your reply. I have found the reason why did the Cortex-M33 core hangs now. It's because:

We use TIM3 Channel5 on our MaaXBoard-8ULP board, which is not same as TIM0 Channel2 on your official iMX8ULP-EVK board. So we need modify the Cortex-M33 SDK for this changes, and it works fine on i.MX8ULP Reversion A0.1 with BSP lf-6.1.1-1.0.0 and Cortex-M33 SDK v2.13.1. Below link is the discussion with your colleague to support it when bring up our board.

https://community.nxp.com/t5/i-MX8ULP-Early-Access-Partner/How-to-enable-TPM3-in-Cortex-M33-SDK/m-p/1494437#M329

Now I have update the Cortex-M33 SDK to v2.14.0, it can work fine on i.MX8ULP Rev A0.1 but failed on Rev A2. Then I debug and find it hangs on Fusion_Init() , which will provide clock for TIM3. This function can work fine on Rev A0.1 but hangs on Rev A2.

int main(void)
{
    /* Initialize standard SDK demo application pins */
    BOARD_ConfigMPU();
    BOARD_InitBootPins();
    BOARD_BootClockRUN();
    BOARD_InitDebugConsole();

    UPOWER_PowerOnMemPart(0U, (uint32_t)kUPOWER_MP1_DMA0);

    //Fusion_Init();
    CLOCK_SetIpSrcDiv(kCLOCK_Tpm3, kCLOCK_FusionTpm3ClkSrcFusionDspBus, 1U, 0U);
    ... ...
    CLOCK_SetIpSrc(kCLOCK_Sai0, kCLOCK_Cm33SaiClkSrcPll1Pfd2Div);

    ... ...  
    CLOCK_EnableClock(kCLOCK_Tpm3);

    ... ...
    RESET_PeripheralReset(kRESET_Lpi2c1);
    RESET_PeripheralReset(kRESET_Tpm3);
    ... ...
}

If comment Fusion_Init() , then both Cortex-M33 SDK and U-boot can work, and they can boot up linux system normally, but TIM3 can not work. So :

For CPU Rev A0.1, it can support TIM3 get clock from Fusion;
For CPU Rev A2, it can't support TIM3 get clock from Fusion;

Attachment is the patch for support TIM3 in SDK v1.14.0, can you give me some guide on how to support CPU Rev. A2 ? Thanks a lot !

Re: i.MX8ULP CPU Rev. A2 Boot failed

wenxue_guo — Mon, 28 Aug 2023 10:23:33 GMT

Hi @Sanket_Parekh

Thaks for your reply. I have found the reason why did the Cortex-M33 core hangs now. It's because:

https://community.nxp.com/t5/i-MX8ULP-Early-Access-Partner/How-to-enable-TPM3-in-Cortex-M33-SDK/m-p/1494437#M329

int main(void) { /* Initialize standard SDK demo application pins */ BOARD_ConfigMPU(); BOARD_InitBootPins(); BOARD_BootClockRUN(); BOARD_InitDebugConsole(); UPOWER_PowerOnMemPart(0U, (uint32_t)kUPOWER_MP1_DMA0); //Fusion_Init(); CLOCK_SetIpSrcDiv(kCLOCK_Tpm3, kCLOCK_FusionTpm3ClkSrcFusionDspBus, 1U, 0U); ... ... CLOCK_SetIpSrc(kCLOCK_Sai0, kCLOCK_Cm33SaiClkSrcPll1Pfd2Div); ... ... CLOCK_EnableClock(kCLOCK_Tpm3); ... ... RESET_PeripheralReset(kRESET_Lpi2c1); RESET_PeripheralReset(kRESET_Tpm3); ... ... }

If comment Fusion_Init() , then both Cortex-M33 SDK and U-boot can work, and they can boot up linux system normally, but TIM3 can not work. So :

For CPU Rev A0.1, it can support TIM3 get clock from Fusion;
For CPU Rev A2, it can't support TIM3 get clock from Fusion;

Attachment is the patch for support TIM3 in SDK v1.14.0, can you give me some guide on how to support CPU Rev. A2 ? Thanks a lot !

Re: i.MX8ULP CPU Rev. A2 Boot failed

adrian_alonso — Tue, 29 Aug 2023 17:45:02 GMT

Hi @wenxue_guo

iMX8ULP A2 Silicon support was added on NXP Linux BSP 2023 Q2 release L6.1.22-2.0.0.

On latest BSP, u-boot specially checks for silicon revision to set system clocks accordingly;

Would recommend if possible update to latest versions

The Software Content Register provides details on version used on all Linux BSP software stack part of each BSP release.

See https://github.com/nxp-imx/meta-imx/blob/mickledore-6.1.22-2.0.0/SCR-6.1.22-2.0.0.txt

From there you can search for uPower and sentinel firmware version used on 2023 Q2 BSP release:

firmware-upower-1.3.0.bin
firmware-sentinel-0.10.bin

You can download directly from NXP FTP Web server the different binary images:

wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-upower-1.3.0.bin

wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.10.bin

And extract the firmware by running

chmod +x firmware-sentinel-0.10.bin ./firmware-sentinel-0.10.bin --auto-accept

chmod +x firmware-upower-1.3.0.bin ./firmware-upower-1.3.0.bin --auto-accept

Use imx-mkimage from Q2 BSP release to generate the boot image

https://github.com/nxp-imx/imx-mkimage/tree/lf-6.1.22_2.0.0

Use SDK 2.14.0 from

https://mcuxpresso.nxp.com/

Notes:

If switching to latest BSP version is lots of work continue using A1 firmware binaries as should be backwards compatible with A2;

Llf-6.1.1-1.0.0 and Cortex-M33 SDK version is SDK_v2.13.1_EVK-MIMX8ULP,

firmware-upower-1.2.0/upower_a1.bin

firmware-sentinel-0.9/mx8ulpa1-ahab-container.img

And build flash.bin image using imx-mkimage from LF-6.1.1-1.0.0 release https://github.com/nxp-imx/imx-mkimage/tree/lf-6.1.1_1.0.0

make SOC=iMX8ULP REV=A1 flash_singleboot_m33

Regards

Adrian

Re: i.MX8ULP CPU Rev. A2 Boot failed

wenxue_guo — Wed, 30 Aug 2023 03:05:22 GMT

Hi @adrian_alonso ,

Thanks for your reply!

Yep, I have read all of them before and upgrade U-boot to lf-6.1.22-2.0.0, Cortex-M33 SDK to v2.14.0 already. The main problem is that we can not enable TPM3 in Mcore SDK on A2 Silicon, but it works fine on A0 Silicon.

As we know, it use TPM0 Ch2 as backlight pwm on imx8ulp-evk board, but we changed it to TPM3 Ch5 on our board for hardware limit. I have fixed this issue with your help when bring up our demo board, it works fine on A0 silicon, even on the latest BSP lf-6.1.22-2.0.0 and SDK v2.14.0, but can not work on A2 silicon using the same code.

Attachment the patch for enable TPM3 in M-core SDK. It will get stuck in CLOCK_SetIpSrcDiv(kCLOCK_Tpm3, kCLOCK_FusionTpm3ClkSrcFusionDspBus, 1U, 0U) and U-boot will hangs for M33 Sync failed on A2 silicon. If comment Fusion_Init() , both u-boot and linux kernel can bootup on A2 silicon, but our LCD can't work for backlight pwm TPM3 not enabled.

It seems the TPM3 clock source fusion management is not same on A0 and A2 silicon. Can you give me some guide to enable TPM3 on A2 silicon? Thanks a lot!

B.R,

Wenxue

Re: i.MX8ULP CPU Rev. A2 Boot failed

wenxue_guo — Mon, 11 Sep 2023 03:11:03 GMT

Hi, @Sanket_Parekh and @adrian_alonso

I have change the M-Core pin PTB13 export as GPIO port in FreeRTOS to A-Core Linux, and set the LCD backlight as gpio-backlight in linux side. It works for our mass manufacture QC test temporarily now.

I have read the M-Core SDK example driver code, and there is no other TPM module example code except TPM0. I don't know how to set TPM3 clock source to enable it, which is different on A2 silicon from A0 now. Can you give me some guide to set PTB13 work as TPM3 Chanel5, so we can control the LCD brightness in linux side when production release. By the way, I see the ticket case 00559949 has been closed, and can not get any help from it.

Thanks a lot!

Best Regards,

Wenxue

Re: i.MX8ULP CPU Rev. A2 Boot failed

wenxue_guo — Mon, 18 Sep 2023 08:55:39 GMT

Hi @Sanket_Parekh and @adrian_alonso ,

Thanks for your help! I have solve this bug already, attachment is the patch file to enable TPM3 Channel5 on PTB13 for our board.

The TPM3 clock should initialize as below:

int main(void) { /* Initialize standard SDK demo application pins */ BOARD_ConfigMPU(); BOARD_InitBootPins(); BOARD_BootClockRUN(); BOARD_InitDebugConsole(); UPOWER_PowerOnMemPart(0U, (uint32_t)kUPOWER_MP1_DMA0); Fusion_Init(); /* Must handshake with uboot, unless will get issues(such as: SoC reset all the time) */ BOARD_HandshakeWithUboot_InAdvance(); CLOCK_SetIpSrc(kCLOCK_Tpm3, kCLOCK_Pcc2BusIpSrcFusionDspBus); RESET_PeripheralReset(kRESET_Tpm3); ... ... }

1. TPM3 clock is from Fusion DSP, so must call Fusion_Init();

2. It must handshake with uboot before setup TPM3 clock source, or SoC will reset all the time and TPM3 clock source setup will hangs;

3. We can not call the predefined BOARD_HandshakeWithUboot() function in rpmsg_lite_str_echo_rtos project directly, because it will use RTOS SDK API but the RTOS is not initial now. That's why it doesn't work before.

4. Then I rewrite the function named BOARD_HandshakeWithUboot_InAdvance() to use NoneOS API to handshake with u-boot, and remove the handshake procedure in app_srtm.c, it works now.

Best Regards,

Wenxue