topic Remove gap between SPI bytes in transfer (i.MX8M Mini). in i.MX Processors

Remove gap between SPI bytes in transfer (i.MX8M Mini).

DanKSI — Wed, 23 Aug 2023 19:03:21 GMT

Hi,

I am using SPI and DMA to transfer data to an external device. This is currently functional, but there is a gap between each byte that I would like to remove to reduce the transfer time.

8 bit burst transfer

This is the current process I have in place with incrementing data (0x00, 0x01,0x02, 0x03, etc.), showing the gap between each byte.

I verified that the ECSPIx_PERIODREG.SAMPLE_PERIOD is 0. I believe I should be able to reduce the gaps between bytes by adjusting the burst size (ECSPIx_CONREG.BURST_LENGTH). I tested with a burst length of 16 bits (instead of 8 bits for the above example).

16 bit burst width

The 16-bit burst width is now sending 16 bits of clock data for each 8 bits of data (which is incorrect). I did notice that there was no longer a gap between the 16 bits of clock data. I think there should be some combination to make this work, but I haven't determined how.

Any help would be appreciated.

Thanks,

Dan K.

Re: Remove gap between SPI bytes in transfer (i.MX8M Mini).

JosephAtNXP — Thu, 24 Aug 2023 20:29:06 GMT

Hi,

Thank you for your interest in NXP Semiconductor products,

That value doesn't seem modifiable by a register in ECSPI module,

And also in data sheet max value doesn't have a reference to a formula involving a clocks count nor a register field,

Could I see the SS signal behaviour aligned to these diagrams you sent?

Seems like that is the problem and as you said, you'd solve that using burst mode if supported by target.

Regards

Re: Remove gap between SPI bytes in transfer (i.MX8M Mini).

DanKSI — Fri, 25 Aug 2023 14:37:18 GMT

Hi,

The specific peripheral I am communicating with doesn't need the SS line, so it doesn't exist. I am guessing that the SS line would normally pulse during the gap period. I think there should be a way to reduce the number of these gaps, but I may be having an issue with how SPI is interacting with DMA.

Thanks.