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    <title>topic How to configure imx8mn-evk-rpmsg.dts in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-configure-imx8mn-evk-rpmsg-dts/m-p/1706509#M210983</link>
    <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;We are using a custom board with iMX8MN (the Azurewave PU551). This board have a DDR memory of 512Mbytes.&lt;/P&gt;&lt;P&gt;We want to use the RPMSG feature, currently it "works" with original DTS (imx8mn-evk-rpmsg.dts) but we have random crashes (after N minutes) (6 minutes with massive 100bytes exchanges, more than 37 minutes with massive 10 bytes exchanges)&lt;/P&gt;&lt;P&gt;When I see the content of&amp;nbsp;(imx8mn-evk-rpmsg.dts) I really don't understand how it's possible that it works "a litle" as all the reserved memory mapping are out of DDR region.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I would like to understand how to configure this file for my plateform.&lt;/P&gt;&lt;P&gt;Here is the A53 memory map:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Cupcake_0-1692264299008.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/236860i8ECDA03565C62BA4/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Cupcake_0-1692264299008.png" alt="Cupcake_0-1692264299008.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;According to this, If I have 512Mbytes available, the available DDR region is between 0x4000'0000 and 0x6000'0000&lt;/P&gt;&lt;P&gt;In the DTS we have this:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;/ {
	reserved-memory {
		#address-cells = &amp;lt;2&amp;gt;;
		#size-cells = &amp;lt;2&amp;gt;;
		ranges;

		m_core_reserved: m_core@0x80000000 {
			no-map;
			reg = &amp;lt;0 0x80000000 0 0x1000000&amp;gt;;
		};

		vdev0vring0: vdev0vring0@b8000000 {
			reg = &amp;lt;0 0xb8000000 0 0x8000&amp;gt;;
			no-map;
		};

		vdev0vring1: vdev0vring1@b8008000 {
			reg = &amp;lt;0 0xb8008000 0 0x8000&amp;gt;;
			no-map;
		};

		rsc_table: rsc_table@b80ff000 {
			reg = &amp;lt;0 0xb80ff000 0 0x1000&amp;gt;;
			no-map;
		};

		vdevbuffer: vdevbuffer@b8400000 {
			compatible = "shared-dma-pool";
			reg = &amp;lt;0 0xb8400000 0 0x100000&amp;gt;;
			no-map;
		};
	};
        .....
	imx8mn-cm7 {
		compatible = "fsl,imx8mn-cm7";
		rsc-da = &amp;lt;0xb8000000&amp;gt;;
		mbox-names = "tx", "rx", "rxdb";
		mboxes = &amp;lt;&amp;amp;mu 0 1
			  &amp;amp;mu 1 1
			  &amp;amp;mu 3 1&amp;gt;;
		memory-region = &amp;lt;&amp;amp;vdevbuffer&amp;gt;, &amp;lt;&amp;amp;vdev0vring0&amp;gt;, &amp;lt;&amp;amp;vdev0vring1&amp;gt;, &amp;lt;&amp;amp;rsc_table&amp;gt;;
		status = "okay";
	};
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;First I would like to know: How to read the reg properties ?&lt;/P&gt;&lt;P&gt;-&amp;gt; On google I found:&amp;nbsp;reg = &amp;lt;address1 length1 [address2 length2] [address3 length3] ... &amp;gt;&lt;/P&gt;&lt;P&gt;-&amp;gt; But here for sure it does not apply, (addresses canot be 0 everywhere)&lt;/P&gt;&lt;P&gt;-&amp;gt; I think here it's &amp;lt; [?] [offset] [?] [size] &amp;gt;. I don't know what is [?]&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Is there any rules to do this mapping ? like alignement ?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is it discribed somewhere what is&amp;nbsp;vdevbuffer,&amp;nbsp;rsc_table,&amp;nbsp;vdev0vring1 and&amp;nbsp;vdev0vring0 ?&lt;/P&gt;&lt;P&gt;-&amp;gt; I don't find any informations about this in reference manual&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I ask the question here, because the support don't want to help me this is not a board provided by them.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for any help.&lt;/P&gt;</description>
    <pubDate>Thu, 17 Aug 2023 09:35:59 GMT</pubDate>
    <dc:creator>Cupcake</dc:creator>
    <dc:date>2023-08-17T09:35:59Z</dc:date>
    <item>
      <title>How to configure imx8mn-evk-rpmsg.dts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-configure-imx8mn-evk-rpmsg-dts/m-p/1706509#M210983</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;We are using a custom board with iMX8MN (the Azurewave PU551). This board have a DDR memory of 512Mbytes.&lt;/P&gt;&lt;P&gt;We want to use the RPMSG feature, currently it "works" with original DTS (imx8mn-evk-rpmsg.dts) but we have random crashes (after N minutes) (6 minutes with massive 100bytes exchanges, more than 37 minutes with massive 10 bytes exchanges)&lt;/P&gt;&lt;P&gt;When I see the content of&amp;nbsp;(imx8mn-evk-rpmsg.dts) I really don't understand how it's possible that it works "a litle" as all the reserved memory mapping are out of DDR region.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I would like to understand how to configure this file for my plateform.&lt;/P&gt;&lt;P&gt;Here is the A53 memory map:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Cupcake_0-1692264299008.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/236860i8ECDA03565C62BA4/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Cupcake_0-1692264299008.png" alt="Cupcake_0-1692264299008.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;According to this, If I have 512Mbytes available, the available DDR region is between 0x4000'0000 and 0x6000'0000&lt;/P&gt;&lt;P&gt;In the DTS we have this:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;/ {
	reserved-memory {
		#address-cells = &amp;lt;2&amp;gt;;
		#size-cells = &amp;lt;2&amp;gt;;
		ranges;

		m_core_reserved: m_core@0x80000000 {
			no-map;
			reg = &amp;lt;0 0x80000000 0 0x1000000&amp;gt;;
		};

		vdev0vring0: vdev0vring0@b8000000 {
			reg = &amp;lt;0 0xb8000000 0 0x8000&amp;gt;;
			no-map;
		};

		vdev0vring1: vdev0vring1@b8008000 {
			reg = &amp;lt;0 0xb8008000 0 0x8000&amp;gt;;
			no-map;
		};

		rsc_table: rsc_table@b80ff000 {
			reg = &amp;lt;0 0xb80ff000 0 0x1000&amp;gt;;
			no-map;
		};

		vdevbuffer: vdevbuffer@b8400000 {
			compatible = "shared-dma-pool";
			reg = &amp;lt;0 0xb8400000 0 0x100000&amp;gt;;
			no-map;
		};
	};
        .....
	imx8mn-cm7 {
		compatible = "fsl,imx8mn-cm7";
		rsc-da = &amp;lt;0xb8000000&amp;gt;;
		mbox-names = "tx", "rx", "rxdb";
		mboxes = &amp;lt;&amp;amp;mu 0 1
			  &amp;amp;mu 1 1
			  &amp;amp;mu 3 1&amp;gt;;
		memory-region = &amp;lt;&amp;amp;vdevbuffer&amp;gt;, &amp;lt;&amp;amp;vdev0vring0&amp;gt;, &amp;lt;&amp;amp;vdev0vring1&amp;gt;, &amp;lt;&amp;amp;rsc_table&amp;gt;;
		status = "okay";
	};
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;First I would like to know: How to read the reg properties ?&lt;/P&gt;&lt;P&gt;-&amp;gt; On google I found:&amp;nbsp;reg = &amp;lt;address1 length1 [address2 length2] [address3 length3] ... &amp;gt;&lt;/P&gt;&lt;P&gt;-&amp;gt; But here for sure it does not apply, (addresses canot be 0 everywhere)&lt;/P&gt;&lt;P&gt;-&amp;gt; I think here it's &amp;lt; [?] [offset] [?] [size] &amp;gt;. I don't know what is [?]&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Is there any rules to do this mapping ? like alignement ?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is it discribed somewhere what is&amp;nbsp;vdevbuffer,&amp;nbsp;rsc_table,&amp;nbsp;vdev0vring1 and&amp;nbsp;vdev0vring0 ?&lt;/P&gt;&lt;P&gt;-&amp;gt; I don't find any informations about this in reference manual&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I ask the question here, because the support don't want to help me this is not a board provided by them.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for any help.&lt;/P&gt;</description>
      <pubDate>Thu, 17 Aug 2023 09:35:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-configure-imx8mn-evk-rpmsg-dts/m-p/1706509#M210983</guid>
      <dc:creator>Cupcake</dc:creator>
      <dc:date>2023-08-17T09:35:59Z</dc:date>
    </item>
    <item>
      <title>Re: How to configure imx8mn-evk-rpmsg.dts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-configure-imx8mn-evk-rpmsg-dts/m-p/1707373#M211044</link>
      <description>&lt;DIV&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/200149"&gt;@Cupcake&lt;/a&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;I hope you are doing well.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;imx8mn-evk-rpmsg.dts is only for i.MX8MN EVK, Customer needs to modify dts and SDK for a custom board with&amp;nbsp;512 MB RAM.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;The customer could use 0x58000000 as a vdev0vring0 ring buffer base address.&lt;/DIV&gt;
&lt;DIV&gt;&lt;BR /&gt;
&lt;DIV&gt;
&lt;DIV class="gmail_signature" dir="ltr" data-smartmail="gmail_signature"&gt;
&lt;DIV dir="ltr"&gt;First I would like to know: How to read the reg properties?&lt;BR /&gt;[Ans]: reg property can be read as below.&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; reg = &amp;lt;address1 length1 [address2 length2] [address3 length3] ... &amp;gt;&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;Here, the address and cell size is 2 (2 words (2 x 32 bit))&lt;/DIV&gt;
&lt;DIV&gt;[in the case where the base address can not fit in 32 bits (start at 0x1 0000 0000) ]&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;for example,&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;reg = &amp;lt;0 0xb8000000 0 0x8000&amp;gt;;&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;here address&amp;nbsp;is 0xb8000000 and size is 0x8000,&amp;nbsp; and 0's are MSB of address&amp;nbsp;and size&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;Are there any rules to do this mapping? like alignment?&lt;BR /&gt;Is it described somewhere what is vdevbuffer, rsc_table, vdev0vring1, and vdev0vring0?&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;[Ans]: Yes, Linux requires a memory region aligned to 0x1000(4KB).&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Please refer to&amp;nbsp;&lt;STRONG&gt;/middleware/multicore/&lt;WBR /&gt;rpmsg_lite/lib/include/&lt;WBR /&gt;platform/imx8mn_m7/rpmsg_&lt;WBR /&gt;platform.h&amp;nbsp;&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;in SDK for more information.&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Remoteproc &amp;amp; rpmsg requires a resource table in cortex-M core ELF to store information about the version, shared memory regions, and other information.&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;Please refer to&lt;STRONG&gt;&amp;nbsp;/boards/evkmimx8mn/&lt;WBR /&gt;multicore_examples/rpmsg_lite_&lt;WBR /&gt;pingpong_rtos/linux_remote/&lt;WBR /&gt;rsc_table.h&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;for more information.&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;One needs to change&amp;nbsp;&lt;STRONG&gt;VDEV0_VRING_BASE&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;in a board.h file of SDK for different DDR sizes.&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;One can also refer to&amp;nbsp;9.1 i.MX Linux RPROC support in&amp;nbsp;&lt;STRONG&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN5317.pdf" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://www.nxp.com/docs/en/application-note/AN5317.pdf&amp;amp;source=gmail&amp;amp;ust=1692431680063000&amp;amp;usg=AOvVaw1fhmzk23gBcalOAH_-WEJr"&gt;AN5317&lt;/A&gt;.&lt;/STRONG&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;STRONG&gt;&amp;nbsp;&lt;/STRONG&gt;&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;I hope it helps!&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;Thanks &amp;amp; Regards,&lt;/DIV&gt;
&lt;DIV dir="ltr"&gt;Sanket Parekh&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;</description>
      <pubDate>Fri, 18 Aug 2023 08:02:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-configure-imx8mn-evk-rpmsg-dts/m-p/1707373#M211044</guid>
      <dc:creator>Sanket_Parekh</dc:creator>
      <dc:date>2023-08-18T08:02:39Z</dc:date>
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