topic Re: LPDDR4 capacity for MIMX8QM6AVUFFAB in i.MX Processors

LPDDR4 capacity for MIMX8QM6AVUFFAB

tw_wang — Tue, 15 Aug 2023 01:33:54 GMT

Could we change the LPDDR4 capacity from 6GB to the 4GB or 8GB on the MIMX8QM6AVUFFAB referece design ?

Re: LPDDR4 capacity for MIMX8QM6AVUFFAB

joanxie — Tue, 15 Aug 2023 02:52:07 GMT

imx8qm supports max lpddr4 up to 4GB

"https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8-8X-8XLite-LPDDR4-and-DDR3L-memory-compatibility-guide/ta-p/1434759"

Re: LPDDR4 capacity for MIMX8QM6AVUFFAB

Mestkim — Wed, 16 Aug 2023 12:45:38 GMT

i.MX 8/8X Family DDR Tools Release - NXP Community

3. Change 0x980000000 to 0xA00000000 in the above chunk of code. That should allow for 8GB density for MX8QM example shown above (for MX8QXP, change 0x8C0000000ULL to 0x900000000ULL for 4GB density).

Re: LPDDR4 capacity for MIMX8QM6AVUFFAB

Mestkim — Wed, 16 Aug 2023 12:50:03 GMT

i.MX8QM MEK board is 6GB.

tw wang knows the i.MX8QM MEK is 6GB.

But you don't know.

and you don't know what is per controller in i.MX 8/8X/8XLite - LPDDR4 and DDR3L memory compat... - NXP Community

Re: LPDDR4 capacity for MIMX8QM6AVUFFAB

joanxie — Thu, 17 Aug 2023 02:50:24 GMT

yes, the imx8qm supports 4GB(per controller) max, this is my misunderstanding, I thought tw_wang needs 8GB/controller, for total 8GB, this is patch

SCFW lilmits the DDR size to 6GB both in DDR tool and Linux BSP.

1. Replace mx8qmb0_scfw_download.bin in DDR_tool/bin with the attached binary. You can stress test all 8GB memory size with your DDR script.

2. Modify board_system_config() in board.c in your SCFW project as follows

/* Board has 6GB8GB memory so fragment upper region and retain 4GB */

BRD_ERR(rm_memreg_frag(pt_boot, &mr_temp, 0x980000000ULL, 0xA00000000ULL,

0xFFFFFFFFFULL));