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    <title>i.MX Processors中的主题 Re: MIMXRT1064 INTERNAL FLASH</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1064-INTERNAL-FLASH/m-p/1699206#M210285</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/216061"&gt;@sandeepc&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; You make things complicate, and refer to the wrong code for the internal flash.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Please refer to this code:&lt;/P&gt;
&lt;P&gt;SDK_2_13_0_EVK-MIMXRT1064\boards\evkmimxrt1064\driver_examples\flexspi\nor_internal\polling_transfer&lt;/P&gt;
&lt;P&gt;&amp;nbsp; You can operate the internal flash directly, the internal flash is the winbond flash.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Please try it again.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; If you can't find this project, please download the new SDK:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://mcuxpresso.nxp.com/" target="_blank"&gt;https://mcuxpresso.nxp.com/&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Wish it helps you!&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;kerry&lt;/P&gt;</description>
    <pubDate>Fri, 04 Aug 2023 07:48:50 GMT</pubDate>
    <dc:creator>kerryzhou</dc:creator>
    <dc:date>2023-08-04T07:48:50Z</dc:date>
    <item>
      <title>MIMXRT1064 INTERNAL FLASH</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1064-INTERNAL-FLASH/m-p/1698635#M210221</link>
      <description>&lt;P&gt;hi i want store some kmph data to the internal flash of the mimxrt1064 i gone through the nxp community i got to know that we can use evkmimxrt1064_flexspi_nor_polling_transfer example to understand so while going through that&amp;nbsp;&lt;/P&gt;&lt;P&gt;link 1:&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/How-to-use-the-RT1064-on-chip-flash-as-NVM/ta-p/1123381" target="_blank"&gt;https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/How-to-use-the-RT1064-on-chip-flash-as-NVM/ta-p/1123381&lt;/A&gt;&lt;/P&gt;&lt;P&gt;==&amp;gt; the example is used flexspi1 i.e external flash so internal flash is connected flexspi2&lt;/P&gt;&lt;P&gt;==&amp;gt;&amp;nbsp;&lt;SPAN&gt;the ROM bootloader will configure the pins of this FlexSPI interface&amp;nbsp;&lt;STRONG&gt; So flexspi configuration is it required or not&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;STRONG&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxp.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/234954iDF9C796B4760735D/image-size/large?v=v2&amp;amp;px=999" role="button" title="nxp.png" alt="nxp.png" /&gt;&lt;/span&gt;&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;==&amp;gt; where can i get Flash size and example sector means&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;==&amp;gt; i didnt get what is meant by&amp;nbsp;&amp;nbsp;&lt;STRONG&gt;customLUT? and&amp;nbsp;&lt;/STRONG&gt;also i didnt get meaning of these two lines&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Erase sector command of the on-chip flash is 0x20 instead of 0xD7.&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;Exchange the FLEXSPI command index for NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD and NOR_CMD_LUT_SEQ_IDX_READ_NORMAL to align with XIP settings.&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;i gone at the last provided link i didnt get api reference manal to understan what it is actually api mean and its argumentsf ew api iam mentionning&amp;nbsp;&lt;/P&gt;&lt;P&gt;1) status = flexspi_nor_get_vendor_id(EXAMPLE_FLEXSPI, &amp;amp;vendorID);&lt;/P&gt;&lt;P&gt;2)&amp;nbsp; status = flexspi_nor_enable_quad_mode(EXAMPLE_FLEXSPI);&lt;/P&gt;&lt;P&gt;3) status = flexspi_nor_flash_erase_sector(EXAMPLE_FLEXSPI, EXAMPLE_SECTOR * SECTOR_SIZE);&lt;/P&gt;&lt;P&gt;4)&amp;nbsp; status =&lt;BR /&gt;flexspi_nor_flash_page_program(EXAMPLE_FLEXSPI, EXAMPLE_SECTOR * SECTOR_SIZE, (void *)s_nor_program_buffer);&lt;/P&gt;&lt;P&gt;few more are there where can i found this api maual&amp;nbsp;&lt;/P&gt;&lt;P&gt;and in which section will be helpfull understand well&amp;nbsp;i.MX RT1064 Processor Reference&lt;BR /&gt;Manual&lt;BR /&gt;Document Number: IMXRT1064RM&lt;BR /&gt;Rev. 2,&lt;/P&gt;&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/60336"&gt;@kerryzhou&lt;/a&gt;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/207690"&gt;@IMXRT1050&lt;/a&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 03 Aug 2023 12:49:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1064-INTERNAL-FLASH/m-p/1698635#M210221</guid>
      <dc:creator>sandeepc</dc:creator>
      <dc:date>2023-08-03T12:49:14Z</dc:date>
    </item>
    <item>
      <title>Re: MIMXRT1064 INTERNAL FLASH</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1064-INTERNAL-FLASH/m-p/1699159#M210278</link>
      <description>&lt;P&gt;hi community update to my my quetion i had done modification by referring below links i compiled and its working but i didnt find &lt;STRONG&gt;ANY API TO READ THE DATA FROM FLASH if i get that api i can verify the data which have writeen&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;1) iam sharing my code below if any correction required please let me&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;2)where can i found the api reference manual for above mentioned functions&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/How-to-use-the-RT1064-on-chip-flash-as-NVM/ta-p/1123381" target="_blank"&gt;https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/How-to-use-the-RT1064-on-chip-flash-as-NVM/ta-p/1123381&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-RT/RT1050-QSPI-flash-change-to-Winbond-W25Q32JV-3-3V/m-p/904534" target="_blank"&gt;https://community.nxp.com/t5/i-MX-RT/RT1050-QSPI-flash-change-to-Winbond-W25Q32JV-3-3V/m-p/904534&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/MCUXpresso-General/I-can-not-erase-QSPI-Flash-W25Q32JV/m-p/884895" target="_blank"&gt;https://community.nxp.com/t5/MCUXpresso-General/I-can-not-erase-QSPI-Flash-W25Q32JV/m-p/884895&lt;/A&gt;&lt;/P&gt;&lt;P&gt;after modification my code is below iam attaching my project please go through it and also iam attaching my file&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;/*&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* Copyright (c) 2016, Freescale Semiconductor, Inc.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* Copyright 2016-2018 NXP&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* All rights reserved.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;*&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;*&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* SPDX-License-Identifier: BSD-3-Clause&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;*/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;#include "fsl_flexspi.h"&lt;/DIV&gt;&lt;DIV&gt;#include "app.h"&lt;/DIV&gt;&lt;DIV&gt;#include "fsl_debug_console.h"&lt;/DIV&gt;&lt;DIV&gt;#include "fsl_cache.h"&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;#include "pin_mux.h"&lt;/DIV&gt;&lt;DIV&gt;#include "clock_config.h"&lt;/DIV&gt;&lt;DIV&gt;#include "board.h"&lt;/DIV&gt;&lt;DIV&gt;#include "fsl_common.h"&lt;/DIV&gt;&lt;DIV&gt;/*******************************************************************************&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* Definitions&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;******************************************************************************/&lt;/DIV&gt;&lt;DIV&gt;/*******************************************************************************&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* Prototypes&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;******************************************************************************/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;/*******************************************************************************&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* Variables&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;******************************************************************************/&lt;/DIV&gt;&lt;DIV&gt;/* Program data buffer should be 4-bytes alignment, which can avoid busfault due to this memory region is configured as&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp;Device Memory by MPU. */&lt;/DIV&gt;&lt;DIV&gt;SDK_ALIGN(static uint8_t s_nor_program_buffer[256], 4);&lt;/DIV&gt;&lt;DIV&gt;static uint8_t s_nor_read_buffer[256];&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;extern status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address);&lt;/DIV&gt;&lt;DIV&gt;extern status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src);&lt;/DIV&gt;&lt;DIV&gt;extern status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId);&lt;/DIV&gt;&lt;DIV&gt;extern status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base);&lt;/DIV&gt;&lt;DIV&gt;extern status_t flexspi_nor_erase_chip(FLEXSPI_Type *base);&lt;/DIV&gt;&lt;DIV&gt;extern void flexspi_nor_flash_init(FLEXSPI_Type *base);&lt;/DIV&gt;&lt;DIV&gt;/*******************************************************************************&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* Code&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;******************************************************************************/&lt;/DIV&gt;&lt;DIV&gt;flexspi_device_config_t deviceconfig = {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.flexspiRootClk&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;= 120000000,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.flashSize&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; = FLASH_SIZE,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.CSIntervalUnit&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;= kFLEXSPI_CsIntervalUnit1SckCycle,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.CSInterval&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;= 2,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.CSHoldTime&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;= 3,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.CSSetupTime&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; = 3,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.dataValidTime&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; = 0,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.columnspace&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; = 0,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.enableWordAddress&amp;nbsp; &amp;nbsp; = 0,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.AWRSeqIndex&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; = 0,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.AWRSeqNumber&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;= 0,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.ARDSeqIndex&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; = NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.ARDSeqNumber&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;= 1,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.AHBWriteWaitUnit&amp;nbsp; &amp;nbsp; &amp;nbsp;= kFLEXSPI_AhbWriteWaitUnit2AhbCycle,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;.AHBWriteWaitInterval = 0,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;const uint32_t customLUT[CUSTOM_LUT_LENGTH] = {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Normal read mode -SDR */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Fast read mode - SDR */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] = FLEXSPI_LUT_SEQ(&lt;/DIV&gt;&lt;DIV&gt;kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Fast read quad mode - SDR */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x6B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] = FLEXSPI_LUT_SEQ(&lt;/DIV&gt;&lt;DIV&gt;kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Read extend parameters */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x81, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Write Enable */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Erase Sector&amp;nbsp; */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Page Program - single mode */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE] =&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x02, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE + 1] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Page Program - quad mode */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x32, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD + 1] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Read ID */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_READID] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x9F, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Enable Quad mode */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x01, kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Enter QPI mode */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_ENTERQPI] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x35, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Exit QPI mode */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_EXITQPI] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_4PAD, 0xF5, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Read status register */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_READSTATUSREG] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x05, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Erase whole chip */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;[4 * NOR_CMD_LUT_SEQ_IDX_ERASECHIP] =&lt;/DIV&gt;&lt;DIV&gt;FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xC7, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),&lt;/DIV&gt;&lt;DIV&gt;};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;int main(void)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uint32_t i = 0;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status_t status;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uint8_t vendorID = 0;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;BOARD_ConfigMPU();&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;BOARD_InitBootPins();&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;BOARD_InitBootClocks();&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;BOARD_InitDebugConsole();&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;flexspi_nor_flash_init(EXAMPLE_FLEXSPI);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("\r\nFLEXSPI example started!\r\n");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Get vendor ID. */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = flexspi_nor_get_vendor_id(EXAMPLE_FLEXSPI, &amp;amp;vendorID);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if (status != kStatus_Success)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;return status;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("Vendor ID: 0x%x\r\n", vendorID);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;#if !(defined(XIP_EXTERNAL_FLASH))&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Erase whole chip . */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("Erasing whole chip over FlexSPI...\r\n");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = flexspi_nor_erase_chip(EXAMPLE_FLEXSPI);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if (status != kStatus_Success)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;return status;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("Erase finished !\r\n");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;#endif&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Enter quad mode. */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = flexspi_nor_enable_quad_mode(EXAMPLE_FLEXSPI);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if (status != kStatus_Success)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;return status;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Erase sectors. */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("Erasing Serial NOR over FlexSPI...\r\n");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = flexspi_nor_flash_erase_sector(EXAMPLE_FLEXSPI, EXAMPLE_SECTOR * SECTOR_SIZE);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if (status != kStatus_Success)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("Erase sector failure !\r\n");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;return -1;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;memset(s_nor_program_buffer, 0xFFU, sizeof(s_nor_program_buffer));&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;DCACHE_InvalidateByRange(EXAMPLE_FLEXSPI_AMBA_BASE + EXAMPLE_SECTOR * SECTOR_SIZE, FLASH_PAGE_SIZE);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;memcpy(s_nor_read_buffer, (void *)(EXAMPLE_FLEXSPI_AMBA_BASE + EXAMPLE_SECTOR * SECTOR_SIZE),&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;sizeof(s_nor_read_buffer));&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if (memcmp(s_nor_program_buffer, s_nor_read_buffer, sizeof(s_nor_program_buffer)))&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("Erase data -&amp;nbsp; read out data value incorrect !\r\n ");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;return -1;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;else&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("Erase data - successfully. \r\n");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;for (i = 0; i &amp;lt; 0xFFU; i++)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;s_nor_program_buffer[i] = i;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status =&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;flexspi_nor_flash_page_program(EXAMPLE_FLEXSPI, EXAMPLE_SECTOR * SECTOR_SIZE, (void *)s_nor_program_buffer);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if (status != kStatus_Success)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("Page program failure !\r\n");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;return -1;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;DCACHE_InvalidateByRange(EXAMPLE_FLEXSPI_AMBA_BASE + EXAMPLE_SECTOR * SECTOR_SIZE, FLASH_PAGE_SIZE);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;memcpy(s_nor_read_buffer, (void *)(EXAMPLE_FLEXSPI_AMBA_BASE + EXAMPLE_SECTOR * SECTOR_SIZE),&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;sizeof(s_nor_read_buffer));&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if (memcmp(s_nor_read_buffer, s_nor_program_buffer, sizeof(s_nor_program_buffer)) != 0)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("Program data -&amp;nbsp; read out data value incorrect !\r\n ");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;return -1;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;else&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;PRINTF("Program data - successfully. \r\n");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;while (1)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base)&lt;BR /&gt;{&lt;BR /&gt;flexspi_transfer_t flashXfer;&lt;BR /&gt;status_t status;&lt;BR /&gt;uint32_t writeValue =0x0200;// FLASH_QUAD_ENABLE;&lt;/P&gt;&lt;P&gt;#if defined(CACHE_MAINTAIN) &amp;amp;&amp;amp; CACHE_MAINTAIN&lt;BR /&gt;flexspi_cache_status_t cacheStatus;&lt;BR /&gt;flexspi_nor_disable_cache(&amp;amp;cacheStatus);&lt;BR /&gt;#endif&lt;/P&gt;&lt;P&gt;/* Write enable */&lt;BR /&gt;status = flexspi_nor_write_enable(base, 0);&lt;/P&gt;&lt;P&gt;if (status != kStatus_Success)&lt;BR /&gt;{&lt;BR /&gt;return status;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;/* Enable quad mode. */&lt;BR /&gt;flashXfer.deviceAddress = 0;&lt;BR /&gt;flashXfer.port = FLASH_PORT;&lt;BR /&gt;flashXfer.cmdType = kFLEXSPI_Write;&lt;BR /&gt;flashXfer.SeqNumber = 1;&lt;BR /&gt;flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG;&lt;BR /&gt;flashXfer.data = &amp;amp;writeValue;&lt;BR /&gt;// flashXfer.dataSize = 1;&lt;BR /&gt;flashXfer.dataSize = 2;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;status = FLEXSPI_TransferBlocking(base, &amp;amp;flashXfer);&lt;BR /&gt;if (status != kStatus_Success)&lt;BR /&gt;{&lt;BR /&gt;return status;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;status = flexspi_nor_wait_bus_busy(base);&lt;/P&gt;&lt;P&gt;/* Do software reset. */&lt;BR /&gt;FLEXSPI_SoftwareReset(base);&lt;/P&gt;&lt;P&gt;#if defined(CACHE_MAINTAIN) &amp;amp;&amp;amp; CACHE_MAINTAIN&lt;BR /&gt;flexspi_nor_enable_cache(cacheStatus);&lt;BR /&gt;#endif&lt;/P&gt;&lt;P&gt;return status;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/60336"&gt;@kerryzhou&lt;/a&gt;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/184336"&gt;@michael_imxrt&lt;/a&gt;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/207690"&gt;@IMXRT1050&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 04 Aug 2023 06:42:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1064-INTERNAL-FLASH/m-p/1699159#M210278</guid>
      <dc:creator>sandeepc</dc:creator>
      <dc:date>2023-08-04T06:42:06Z</dc:date>
    </item>
    <item>
      <title>Re: MIMXRT1064 INTERNAL FLASH</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1064-INTERNAL-FLASH/m-p/1699206#M210285</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/216061"&gt;@sandeepc&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; You make things complicate, and refer to the wrong code for the internal flash.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Please refer to this code:&lt;/P&gt;
&lt;P&gt;SDK_2_13_0_EVK-MIMXRT1064\boards\evkmimxrt1064\driver_examples\flexspi\nor_internal\polling_transfer&lt;/P&gt;
&lt;P&gt;&amp;nbsp; You can operate the internal flash directly, the internal flash is the winbond flash.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Please try it again.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; If you can't find this project, please download the new SDK:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://mcuxpresso.nxp.com/" target="_blank"&gt;https://mcuxpresso.nxp.com/&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Wish it helps you!&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;kerry&lt;/P&gt;</description>
      <pubDate>Fri, 04 Aug 2023 07:48:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1064-INTERNAL-FLASH/m-p/1699206#M210285</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2023-08-04T07:48:50Z</dc:date>
    </item>
    <item>
      <title>Re: MIMXRT1064 INTERNAL FLASH</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1064-INTERNAL-FLASH/m-p/1699300#M210300</link>
      <description>thaank you kerryzhou it is working fine now both example and as well as below replied code</description>
      <pubDate>Fri, 04 Aug 2023 09:13:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIMXRT1064-INTERNAL-FLASH/m-p/1699300#M210300</guid>
      <dc:creator>sandeepc</dc:creator>
      <dc:date>2023-08-04T09:13:45Z</dc:date>
    </item>
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