<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Integrate  the SLB9670 TPM with IMx8MM EVK in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Integrate-the-SLB9670-TPM-with-IMx8MM-EVK/m-p/1698709#M210227</link>
    <description>&lt;P&gt;Hello&lt;/P&gt;
&lt;P&gt;this appnote may be helpful for your design.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13633.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN13633.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
    <pubDate>Thu, 03 Aug 2023 14:47:49 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2023-08-03T14:47:49Z</dc:date>
    <item>
      <title>Integrate  the SLB9670 TPM with IMx8MM EVK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Integrate-the-SLB9670-TPM-with-IMx8MM-EVK/m-p/1697679#M210141</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;We tired to integrate the SLB9670 with the IMX8MM EVK through the SPI communication.We used the ECSPI2 pins from the expansion connector to connect the TPM module.&lt;/P&gt;&lt;P&gt;In device tree file imx8mm-evk.dtsi file.Added the below lines for the device tree integration&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;&amp;amp;ecspi2 {
	#address-cells = &amp;lt;1&amp;gt;;
	#size-cells = &amp;lt;0&amp;gt;;
	fsl,spi-num-chipselects = &amp;lt;1&amp;gt;;
	pinctrl-names = "default";
	pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ecspi2 &amp;amp;pinctrl_ecspi2_cs&amp;gt;;
	cs-gpios = &amp;lt;&amp;amp;gpio5 13 GPIO_ACTIVE_LOW&amp;gt;;
	status = "okay";

	/*spidev0: spi@0 {
		reg = &amp;lt;0&amp;gt;;
		compatible = "rohm,dh2228fv";
		spi-max-frequency = &amp;lt;500000&amp;gt;;
	};*/

	slb9670: slb9670@0 {
		compatible="infineon,slb9670","tcg,tpm_tis-spi";
		/*fsl,spi-num-chipselects = &amp;lt;1&amp;gt;;
		pinctrl-names = "default";
		pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ecspi2 &amp;amp;pinctrl_ecspi2_cs&amp;gt;;
		*/
		reg = &amp;lt;0&amp;gt;;	
		cs-gpios = &amp;lt;&amp;amp;gpio5 13 GPIO_ACTIVE_LOW&amp;gt;;
		spi-max-frequency = &amp;lt;38000000&amp;gt;;
		status = "okay";
       };
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;The TPM device is not listed in the /dev/ in the userspace.&lt;/P&gt;&lt;P&gt;In the device tree file the&amp;nbsp; 0x82 is set for the SCLK/MOSI/MISO pins.Why this same value is configured for all pins.&lt;/P&gt;&lt;P&gt;pinctrl_ecspi2: ecspi2grp {&lt;BR /&gt;fsl,pins = &amp;lt;&lt;BR /&gt;MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82&lt;BR /&gt;MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82&lt;BR /&gt;MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82&lt;BR /&gt;&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;pinctrl_ecspi2_cs: ecspi2cs {&lt;BR /&gt;fsl,pins = &amp;lt;&lt;BR /&gt;MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40000&lt;BR /&gt;&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;Could you please help on how to integrate TPM with IMX8MM?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;kanimozhi&lt;/P&gt;</description>
      <pubDate>Thu, 03 Aug 2023 13:43:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Integrate-the-SLB9670-TPM-with-IMx8MM-EVK/m-p/1697679#M210141</guid>
      <dc:creator>kanimozhi_t</dc:creator>
      <dc:date>2023-08-03T13:43:17Z</dc:date>
    </item>
    <item>
      <title>Re: Integrate  the SLB9670 TPM with IMx8MM EVK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Integrate-the-SLB9670-TPM-with-IMx8MM-EVK/m-p/1698709#M210227</link>
      <description>&lt;P&gt;Hello&lt;/P&gt;
&lt;P&gt;this appnote may be helpful for your design.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13633.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN13633.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Thu, 03 Aug 2023 14:47:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Integrate-the-SLB9670-TPM-with-IMx8MM-EVK/m-p/1698709#M210227</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2023-08-03T14:47:49Z</dc:date>
    </item>
    <item>
      <title>Re: Integrate  the SLB9670 TPM with IMx8MM EVK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Integrate-the-SLB9670-TPM-with-IMx8MM-EVK/m-p/1699341#M210310</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;How to configure the ECSPI as master to communicate with the TPM&amp;nbsp; device SLB9670?&lt;/P&gt;&lt;P&gt;In the shared link it looks the ECSPI is configured as the slave&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Thanks&lt;/P&gt;&lt;P&gt;Kanimozhi&lt;/P&gt;</description>
      <pubDate>Fri, 04 Aug 2023 10:15:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Integrate-the-SLB9670-TPM-with-IMx8MM-EVK/m-p/1699341#M210310</guid>
      <dc:creator>kanimozhi_t</dc:creator>
      <dc:date>2023-08-04T10:15:32Z</dc:date>
    </item>
    <item>
      <title>Re: Integrate  the SLB9670 TPM with IMx8MM EVK</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Integrate-the-SLB9670-TPM-with-IMx8MM-EVK/m-p/1699434#M210322</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have gone through the App note you have shared, but it doesnt mention any details about the SPI Master configuration in the device tree.&lt;/P&gt;&lt;P&gt;Can we get an example working device tree configuration for the ECSPI2 working as SPI Master and example any SPI slave device connected to it.&lt;/P&gt;&lt;P&gt;We also see that a default spi device connected to the ECSPI2 device configuration as below,&lt;/P&gt;&lt;P&gt;spidev0: spi@0 {&lt;BR /&gt;reg = &amp;lt;0&amp;gt;;&lt;BR /&gt;compatible = "rohm,dh2228fv";&lt;BR /&gt;spi-max-frequency = &amp;lt;500000&amp;gt;;&lt;/P&gt;&lt;P&gt;If we comment this spidev0 in the device tree configuration, then the we face an error during our yocto build,&lt;/P&gt;&lt;P&gt;Error occurs in the imx8mmevk-ecspi-slave.dts file.Not able to find the spidev0&lt;/P&gt;&lt;P&gt;When we include the our TPM device configuration also in the ecspi2 node, error ocuurs as the failed configure slb9670@30830000&lt;/P&gt;&lt;P&gt;&amp;amp;ecspi2 {&lt;BR /&gt;&lt;BR /&gt;slb9670: slb9670@0 {&lt;BR /&gt;compatible="infineon,slb9670","tcg,tpm_tis-spi";&lt;BR /&gt;/*fsl,spi-num-chipselects = &amp;lt;1&amp;gt;;&lt;BR /&gt;pinctrl-names = "default";&lt;BR /&gt;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ecspi2 &amp;amp;pinctrl_ecspi2_cs&amp;gt;;&lt;BR /&gt;*/&lt;BR /&gt;reg = &amp;lt;0&amp;gt;;&lt;BR /&gt;cs-gpios = &amp;lt;&amp;amp;gpio5 13 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt;spi-max-frequency = &amp;lt;38000000&amp;gt;;&lt;BR /&gt;status = "okay";&lt;BR /&gt;};&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;When we change the reg=&amp;lt;1&amp;gt;, there is no error information, but the TPM device is not listed in userspace.&lt;/P&gt;&lt;P&gt;We directly plugin the TPM module to the expansion connector. And we use the chip select pin assigned in the iMX8MMini processor.&lt;/P&gt;&lt;P&gt;Menu config in user space configured as below&lt;/P&gt;&lt;P&gt;Default&lt;BR /&gt;*SPI support is enabled&lt;/P&gt;&lt;P&gt;*TPM hardware information -&amp;gt; Default infenion TPM&amp;nbsp; and tcg spi support enable as the module and we changed to builtin option&lt;/P&gt;&lt;P&gt;How to configure the ECSPI as master to communicate with the TPM device SLB9670?&lt;/P&gt;&lt;P&gt;Is there any other thing need to configure in the Menuconfig for integrating the TPM module?&lt;/P&gt;&lt;P&gt;We looked into the application note AN13633, We not find any configuration related to ECSPI as master mode?&lt;/P&gt;&lt;P&gt;In the device tree file SCLK/MOSI/MISO set as 0x82.Why this value is configured?&lt;/P&gt;&lt;P&gt;pinctrl_ecspi2: ecspi2grp {&lt;BR /&gt;fsl,pins = &amp;lt;&lt;BR /&gt;MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82&lt;BR /&gt;MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82&lt;BR /&gt;MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82&lt;BR /&gt;&amp;gt;;&lt;/P&gt;&lt;P&gt;I observe in the forum threads that this 0x82 value is replaced with 0x116 including the MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 set to 0x116.&lt;/P&gt;&lt;P&gt;Which value should be used for running the ECSPI2 as SPI master and how is this 0x82 or 0x116 derived to be set?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Thanks&lt;/P&gt;&lt;P&gt;Kanimozhi&lt;/P&gt;</description>
      <pubDate>Fri, 04 Aug 2023 13:24:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Integrate-the-SLB9670-TPM-with-IMx8MM-EVK/m-p/1699434#M210322</guid>
      <dc:creator>kanimozhi_t</dc:creator>
      <dc:date>2023-08-04T13:24:50Z</dc:date>
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  </channel>
</rss>

