topic ADC scaling in i.MX Processors

ADC scaling

stefano-quantic — Thu, 13 Jul 2023 07:23:23 GMT

In iMXRT1176, when setting the ADCxCMDLy[CSCALE] bit in order to scale the analog signal by 30/64 before converting it, how is the ADC input resistance affected? Does it create a voltage divider on the input signal, so that I would need a voltage buffer on the pin, to avoid distorting the signal?

Re: ADC scaling

kerryzhou — Fri, 14 Jul 2023 06:33:39 GMT

Hi @stefano-quantic

About the ADC input resistor which is influenced by the CSCALE, we still don't have the data, you can still use the normal input resistor, when select the CSCALE, the internal circuit will reduces the selected ADC analog channel input voltage level by a factor.

You also need to consider the VREFH situation.

For example: if 3.3V input voltage required then scale factor must be enabled ADC reference must be set to 1.54V (only supported on VREFH).

Wish it helps you!

Best Regards,

Kerry

Re: ADC scaling

stefano-quantic — Fri, 14 Jul 2023 07:46:48 GMT

I have 1V8 on VREFH and I can't change it.
The ADC would hypothetically read up to 3.84V, but losing the [3.3, 3.84]V range (thus losing some resolution) will not be a problem.

What I'm worried about is whether this scaling factor introduces a voltage divider, forcing me to use a voltage buffer not to distort the signal.

Please let me know when you have more information.

Re: ADC scaling

kerryzhou — Fri, 14 Jul 2023 08:32:41 GMT

Hi @stefano-quantic ,

I think you need the voltage buffer or at least the voltage limit, which is not higher than the ADC max input voltage. Otherwise, it may influence the pad.

Wish it helps you!
Best Regards,

Kerry