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    <title>topic Re: A53 core suspend in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1686430#M209115</link>
    <description>&lt;P&gt;I means suspend to RAM, in this mode, DDR is in self refresh and ARM core power is turned off. SCFW recorded the A core resume address. After received the wakup event, such as GPIO, RTC, ON/OFF button, the A core can resume and continue to run. It is not WFI.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For WFI, it is used for CPU IDLE, if you just need CPU IDLE, then no ATF and SCFW APIs are needed for your case.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;There are big power comsunption difference between CPU IDLE and SUSPEND.&lt;/P&gt;</description>
    <pubDate>Wed, 12 Jul 2023 08:35:19 GMT</pubDate>
    <dc:creator>qiang_li-mpu_se</dc:creator>
    <dc:date>2023-07-12T08:35:19Z</dc:date>
    <item>
      <title>A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1669202#M207594</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am using imxqm with only A53 cores enabled.&lt;/P&gt;&lt;P&gt;Presently trying to self suspend A53 cores(0,1,2,3) using below mentioned scu API but i see cores are not suspending and DDR also not in refresh mode.&lt;/P&gt;&lt;P&gt;/*************************************sleep sequence****************************************************/&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;sc_irq_enable(ipc_handle, 297U, SC_IRQ_GROUP_WAKE, SC_IRQ_PAD, SC_TRUE);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Enable GPIO pad wakeup */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pad_set_wakeup(ipc_handle, 40U, 6U);//SC_PAD_WAKEUP_RISE_EDGE 6U&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* make sure system sources power ON in low power mode by default */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_low_power_mode(ipc_handle, SC_R_A53_0, SC_PM_PW_MODE_ON);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Config system interface HPM, LPM */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_DDR, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_OCMEM, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_MU, SC_PM_PW_MODE_OFF, SC_PM_PW_MODE_OFF);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_INTERCONNECT, SC_PM_PW_MODE_ON,&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC_PM_PW_MODE_OFF);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_set_cpu_resume(ipc_handle, SC_R_A53_0,true, 0x80000000);//&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_cpu_low_power_mode(ipc_handle, 1U,SC_PM_PW_MODE_OFF, SC_PM_WAKE_SRC_SCU);&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;__asm__("dsb sy");&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; __asm__("wfi");&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;while(1);&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;/************************************************************************************************/&lt;/P&gt;&lt;P&gt;/***************************wake-up sequence******************************************/&lt;/P&gt;&lt;P&gt;/* Query SCU wakeup event status */&lt;BR /&gt;#if 1&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; uInt32 status;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_irq_status(ipc_handle, 297U, SC_IRQ_GROUP_WAKE, &amp;amp;status);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Check for pad wakeup */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (status &amp;amp; SC_IRQ_PAD)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Check for GPIO pad wakeup */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Note: SCFW updates pending pad wakeup config to SC_PAD_WAKEUP_OFF */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; uInt8 gpio_wakeup;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //sc_pad_get_wakeup(ipc_handle, 40U, &amp;amp;gpio_wakeup);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (gpio_wakeup == SC_PAD_WAKEUP_OFF)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* GPIO pad generated wake event */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; print(DEBUG_PRINT_ALWAYS, "GPIO wakeup\r\n");&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; } }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is the suspend sequnce all good, because if i add any print statemnt inside while(1), is it still executing that mean A53 are still alive.&lt;/P&gt;&lt;P&gt;Is there any other steps do we need to follow before suspending, or is there any method to check if cores are suspend mode.&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 14 Jun 2023 10:17:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1669202#M207594</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-06-14T10:17:50Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1671340#M207742</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;Your sequence looks correct, just that you didn't set the A53 Core into low power mode, you may take the following sample code as reference.&lt;BR /&gt;&lt;A href="https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8qm/imx8qm_psci.c#L195" target="_blank"&gt;https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8qm/imx8qm_psci.c#L195&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;So you're missing this one:&lt;BR /&gt;sc_pm_req_low_power_mode(ipc_handle, SC_R_A53, SC_PM_PW_MODE_OFF);&lt;BR /&gt;&lt;BR /&gt;All other seems correct, please try it and let us know.&lt;BR /&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Fri, 16 Jun 2023 22:08:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1671340#M207742</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2023-06-16T22:08:08Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1671586#M207766</link>
      <description>&lt;P&gt;Hi Aldo,&lt;/P&gt;&lt;P&gt;I tried by adding the API but still the issue is same.&lt;/P&gt;&lt;P&gt;below is the updated sequence.&lt;/P&gt;&lt;P&gt;//suspend//&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;/* Register for PAD wakeup */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_irq_enable(ipc_handle, 297U, SC_IRQ_GROUP_WAKE, SC_IRQ_PAD, SC_TRUE);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Enable GPIO pad wakeup */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pad_set_wakeup(ipc_handle, 40U, 6U);//SC_PAD_WAKEUP_RISE_EDGE 6U&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* make sure system sources power ON in low power mode by default */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_low_power_mode(ipc_handle, SC_R_A53, SC_PM_PW_MODE_OFF);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Config system interface HPM, LPM */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_DDR, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_OCMEM, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_MU, SC_PM_PW_MODE_OFF, SC_PM_PW_MODE_OFF);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_INTERCONNECT, SC_PM_PW_MODE_ON,&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC_PM_PW_MODE_OFF);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_set_cpu_resume(ipc_handle, SC_R_A53_0,true, 0x80000000);//&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_cpu_low_power_mode(ipc_handle, SC_R_A53_0,SC_PM_PW_MODE_OFF, SC_PM_WAKE_SRC_SCU);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_cpu_low_power_mode(ipc_handle, SC_R_A53_1, SC_PM_PW_MODE_OFF, SC_PM_WAKE_SRC_SCU);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_cpu_low_power_mode(ipc_handle, SC_R_A53_2, SC_PM_PW_MODE_OFF, SC_PM_WAKE_SRC_SCU);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; sc_pm_req_cpu_low_power_mode(ipc_handle, SC_R_A53_3, SC_PM_PW_MODE_OFF, SC_PM_WAKE_SRC_SCU);&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;__asm__("dsb");&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; __asm__("isb");&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; __asm__("wfi");&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //__asm__("wfi");&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while (1)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; print(DEBUG_PRINT_ALWAYS, ".\r\n");&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/SPAN&gt;&lt;/SPAN&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 19 Jun 2023 05:09:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1671586#M207766</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-06-19T05:09:46Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1672251#M207828</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;I see no problems with the sequence you have shared it looks practically the same with the sample code we have available I have shared previously.&lt;BR /&gt;&lt;BR /&gt;Also, you may be able to enable Debug Monitor on the SCFW, so you may check the state of the resources while they are in LPM, just for debugging purpose.&lt;BR /&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Tue, 20 Jun 2023 01:04:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1672251#M207828</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2023-06-20T01:04:24Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1672385#M207835</link>
      <description>&lt;P&gt;Do we need to flush cache before executing wfi or do we any errata for A53 on why WFI does not work.&lt;/P&gt;&lt;P&gt;and also for enabling Debug Monitor, i went through the document and it specifies "The debug monitor&lt;BR /&gt;allows command-line interaction via the SCU UART" : which are hardware pins&amp;nbsp; we need connect in soc to for SCU UART.&lt;/P&gt;</description>
      <pubDate>Tue, 20 Jun 2023 05:31:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1672385#M207835</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-06-20T05:31:42Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1673070#M207896</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;&lt;BR /&gt;As stated in the reference manual for the i.MX8QM, chapter 11.1.1.5 Interface:&lt;BR /&gt;Assuming that a simple standby state with no state loss is required, there is no preparation required, and the core may simply perform the WFI operation. The caches are kept coherent in this state, and resumption is caused by an interrupt to the core.&lt;BR /&gt;&lt;BR /&gt;If transition is required to lower power states for the core, then before the WFI is signaled, the core must ensure that any architectural state is saved to memory, cache is disabled, flushed, and then removed from the coherency domain. The SCU must also have been told that the intent is to transition to this lower power state.&lt;BR /&gt;&lt;BR /&gt;Also, regarding debug monitor, if you are using our MEK board, it has two serial ports, the first one (usually ttyUSB0) is used by the A cores (u-boot/Linux in this case), the second one is used by one of the M4 cores or&amp;nbsp;the SCFW when debug monitor is enabled.&lt;BR /&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Tue, 20 Jun 2023 23:37:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1673070#M207896</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2023-06-20T23:37:29Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1673803#M207967</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for the confirmation,&lt;/P&gt;&lt;P&gt;To further understand why cores are not suspending after WFI, arm for a53 suggests as below&lt;/P&gt;&lt;P&gt;/*********************************/&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;On entry into WFI low-power state,&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;STANDBYWFI&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;for that core is asserted. Assertion of&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;STANDBYWFI&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;guarantees that the core is in idle and low-power state.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/***************************/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;On imx8qm how to check the STANDBYWFI signal. is there any register available.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;-Lakshmi&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 21 Jun 2023 16:39:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1673803#M207967</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-06-21T16:39:52Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1674568#M208009</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;We are looking for the immediate support on wfi not working on A53 cores (imx8qm),&lt;/P&gt;&lt;P&gt;Please help us to identify the issue.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Lakshmi&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 22 Jun 2023 16:30:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1674568#M208009</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-06-22T16:30:52Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1676429#M208170</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;Sorry for the delayed response, please note that it is the SCFW which will handle the system power states, the SCFW also monitors the state of the system to enter the lowest possible power state.&amp;nbsp; SCFW&amp;nbsp;uses the following to&amp;nbsp;evaluate the system power state :&lt;BR /&gt;&lt;BR /&gt;Executing&amp;nbsp;environments (EEs) manage individual resources using SCFW APIs for resources (sc_pm_set_resource_power_mode).&amp;nbsp; After all resources within a subsystem are powered down,&amp;nbsp;SCFW will automatically power down the entire subsystem.&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;EEs manage shared system resources such as DDR, on-chip memory, and system interconnect using SCFW APIs for system interfaces (sc_pm_req_sys_if_power_mode).&amp;nbsp; EEs specify power requirements for these shared resources during high-power mode (HPM) and low-power mode (LPM).&amp;nbsp;&amp;nbsp;If any EE is in HPM, SCFW will keep the system in HPM and set the system interfaces to the highest HPM power mode&amp;nbsp;among all&amp;nbsp;EEs&amp;nbsp;currently in&amp;nbsp;HPM.&amp;nbsp; If all EEs are in LPM, the SCFW will transition the system to LPM and set the system interfaces to the highest LPM power mode&amp;nbsp;for all EEs.&lt;BR /&gt;&lt;BR /&gt;Cortex-A EEs manage their LPM configuration using SCFW APIs (sc_pm_req_cpu_low_power_mode).&amp;nbsp; This API is also used to signal the SCFW to monitor individual CPU WFI signals and apply the LPM configuration once WFI has been reached.&lt;BR /&gt;&lt;BR /&gt;There is the&amp;nbsp;call&amp;nbsp;sc_pm_get_resource_power_mode()&amp;nbsp;to&amp;nbsp;retrieve a resource current power mode, this for debugging purpose just to be sure the resource current state.&lt;BR /&gt;&lt;BR /&gt;So I would like to know how are you testing going into low power mode?&lt;BR /&gt;Did you try by enabling debug monitor and check that it does not go into low power?&lt;BR /&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Tue, 27 Jun 2023 01:12:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1676429#M208170</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2023-06-27T01:12:39Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1679786#M208452</link>
      <description>&lt;P&gt;Hi Aldo,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for the explanation.&lt;/P&gt;&lt;P&gt;SCU API are all good.&lt;/P&gt;&lt;P&gt;what we suspect is we are not able to put cores in WFI state. We feel that cores are getting continuous interrupts in our system.&lt;/P&gt;&lt;P&gt;Can we identify which interrupt been served to cores? Do we have such provision?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 30 Jun 2023 18:35:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1679786#M208452</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-06-30T18:35:19Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1681463#M208641</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;I'll double check with internal team if we have something available.&lt;BR /&gt;Could you share how are you testing this?&lt;BR /&gt;Maybe sharing some rough steps to try to replicate.&lt;BR /&gt;&lt;BR /&gt;Thank you,&lt;BR /&gt;Best regards,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Tue, 04 Jul 2023 23:40:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1681463#M208641</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2023-07-04T23:40:26Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1681877#M208686</link>
      <description>&lt;P&gt;steps followed:&lt;/P&gt;&lt;P&gt;Power down sequence.&lt;/P&gt;&lt;P&gt;1. Detect the powerd down.&lt;/P&gt;&lt;P&gt;2. prepare scu for core low-power&lt;/P&gt;&lt;P&gt;3. disable irq_steer&lt;/P&gt;&lt;P&gt;4.disable irq,fiq&lt;/P&gt;&lt;P&gt;5. execute wfi(dsb and isb before wfi)&amp;nbsp;&lt;/P&gt;&lt;P&gt;6. once core is out from wfi scu, poll for scu irq status to check if wake up from configured pad.&lt;/P&gt;&lt;P&gt;7.resuem back core to normall mode.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 05 Jul 2023 09:02:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1681877#M208686</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-07-05T09:02:11Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1681911#M208691</link>
      <description>&lt;P&gt;For iMX8QM, when suspend the A53 core, the SCFW will turn off the A53 core power.&lt;/P&gt;
&lt;P&gt;I think you need reference to the ATF "arm-trusted-firmware" code, function&amp;nbsp;imx_domain_suspend() of file "arm-trusted-firmware\plat\imx\imx8qm\imx8qm_psci.c". Before suspend, ATF will set the resume address to SCFW, it is the ATF base address in DDR, then after suspend, SCFW will track the GPIO PAD wakeup event, after get the wake up signal, SCFW will turn on the A53 power, ATF will start to run again, ATF will check, it is cold boot or resume boot, for resume it will call&amp;nbsp;imx_domain_suspend_finish() "in imx8qm_psci.c" to do the resume tasks.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The ATF code can be found at&amp;nbsp;&lt;A href="https://github.com/nxp-imx/imx-atf" target="_blank" rel="noopener"&gt;https://github.com/nxp-imx/imx-atf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;ATF suspend main sequence:&amp;nbsp;imx_domain_suspend() -&amp;gt;&amp;nbsp;imx_pwr_domain_pwr_down_wfi(), they are called from function&amp;nbsp;psci_cpu_suspend_start() of file "arm-trusted-firmware\lib\psci\psci_suspend.c"&lt;/P&gt;</description>
      <pubDate>Wed, 05 Jul 2023 09:43:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1681911#M208691</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2023-07-05T09:43:27Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1681949#M208697</link>
      <description>&lt;P&gt;Thanks for the quick response.&lt;/P&gt;&lt;P&gt;I tried the sequence as mentioned in the ATF build, still core suspend and resume is not working.&lt;/P&gt;&lt;P&gt;is there any pre condition we need to have before sending commands to SCU for suspend&lt;/P&gt;</description>
      <pubDate>Wed, 05 Jul 2023 10:17:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1681949#M208697</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-07-05T10:17:32Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1682649#M208750</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/215301"&gt;@Lakshmi_AG&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;For quickly method, I think you can use the ATF directly, then put your own image to address 0x80020000 like the Uboot. The mkimage command can be "./mkimage_imx8 -soc QM -rev B0 -append mx8qmb0-ahab-container.img -c -scfw scfw_tcm.bin -ap bl31.bin a53 0x80000000 your_image.bin --data 0x80020000 -out flash.bin"&lt;/P&gt;
&lt;P&gt;After ATF successfully booted, it will jump to address 0x80020000 to run&amp;nbsp;your_image.bin.&lt;/P&gt;
&lt;P&gt;Then in your own image, you can call ATF's psci APIs with smccc method. Uboot example can be followed:&lt;/P&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;#define PSCI_SYSTEM_SUSPEND_AARCH64 0xc400000e&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;int do_board_suspend(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;{&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; struct udevice *dev;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; uclass_get_device_by_name(UCLASS_FIRMWARE, "psci", &amp;amp;dev);&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; invoke_psci_fn(PSCI_SYSTEM_SUSPEND_AARCH64, 0, 0, 0);&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; return 1;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;}&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;U_BOOT_CMD(&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; suspend, 1, 1, do_board_suspend,&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; "suspend\n",&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; "system board suspend for i.MX 8 Quad devices \n"&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;FONT color="#0000FF"&gt;);&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;If you can't use ATF directly, the you need porting the ATF code, it needs time to debug in your side. For such kind of debug, you can build scfw with "M=1" to enable the SCFW debug UART, then after run the suspend in your software, you can run command "power.r" in SCFW debug UART to check which module hasn't been turned off, then you need check the related code.&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;</description>
      <pubDate>Thu, 06 Jul 2023 03:11:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1682649#M208750</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2023-07-06T03:11:09Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1684425#M208915</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&amp;nbsp;&lt;SPAN class=""&gt;&lt;A href="https://community.nxp.com/t5/user/viewprofilepage/user-id/4760" target="_self"&gt;&lt;SPAN class=""&gt;qiang_li-mpu_se&lt;/SPAN&gt;&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;Thanks for the response.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;Presently we are in 32bit mode,&amp;nbsp; can i get macro for 32bit,&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;and also Do we have a example or a document to talk to ATF.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;or Uboot code path for reference i can use.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;Regards&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;Lakshmi&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 10 Jul 2023 03:36:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1684425#M208915</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-07-10T03:36:40Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1684702#M208951</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/4760"&gt;@qiang_li-mpu_se&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;I have started integrating the code to talk to atf,&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;invoke_psci_fn(PSCI_SYSTEM_SUSPEND_AARCH64, 0, 0, 0);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;defined the invoke_psci_fn as below.. but got a doubt how does it gets invoked with the bl31.bin&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;is there any linker updates we need to do, or below code will work fine for me&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;****************************************************************************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;typedef unsigned long (psci_fn)(unsigned long, unsigned long,&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned long, unsigned long);&lt;BR /&gt;static psci_fn *invoke_psci_fn;&lt;/P&gt;&lt;P&gt;#define SMCCC_VERSION 0x80000000&lt;BR /&gt;void suspend_using_atf(void)&lt;BR /&gt;{&lt;BR /&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; struct udevice *dev;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; invoke_psci_fn(SMCCC_VERSION , 0, 0, 0);&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;return 1;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;*********************************************************************************************&lt;/P&gt;</description>
      <pubDate>Mon, 10 Jul 2023 09:01:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1684702#M208951</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-07-10T09:01:01Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1684754#M208957</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/215301"&gt;@Lakshmi_AG&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If your code is 32 bits, I think it can't work, because the ATF is 64 bits.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;In Uboot, some files can be referenced for psci:&lt;/P&gt;
&lt;P&gt;uboot-imx\arch\arm\cpu\armv8\psci.S&lt;/P&gt;
&lt;P&gt;uboot-imx\arch\arm\cpu\armv8\smccc-call.S&lt;/P&gt;
&lt;P&gt;uboot-imx\arch\arm\cpu\armv8\cpu.c&lt;/P&gt;
&lt;P&gt;uboot-imx\drivers\firmware\psci.c&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The smccc, psci method can be found from ARM website:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://developer.arm.com/Architectures/Secure%20Monitor%20Calling%20Convention" target="_blank"&gt;https://developer.arm.com/Architectures/Secure%20Monitor%20Calling%20Convention&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://developer.arm.com/documentation/den0028/latest/" target="_blank"&gt;https://developer.arm.com/documentation/den0028/latest/&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;From my understand, ATF has the handler to process smccc function calls.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 10 Jul 2023 09:47:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1684754#M208957</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2023-07-10T09:47:08Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1685324#M209001</link>
      <description>&lt;P&gt;After ATF (bl31.bin) run, it will register service and handler for smccc. Then when kernel, Uboot or other software calls invoke_psci_fn(), it will goto arm_smccc_smc() as followed, the ATF handler and service will get the function call. No linker updates are needed.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;DIV&gt;ENTRY(__arm_smccc_smc)&lt;/DIV&gt;
&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; SMCCC smc&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV&gt;ENDPROC(__arm_smccc_smc)&lt;/DIV&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 11 Jul 2023 03:21:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1685324#M209001</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2023-07-11T03:21:37Z</dc:date>
    </item>
    <item>
      <title>Re: A53 core suspend</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1686283#M209104</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/4760"&gt;@qiang_li-mpu_se&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If we are in 32bit mode, and if we cannot communicate with ATF(since atf running in 64 bit) with smccc method, is there any other way to do power management.&amp;nbsp;&lt;/P&gt;&lt;P&gt;or any other mode to talk to ATF from 32 bit system&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Lakshmi&lt;/P&gt;</description>
      <pubDate>Wed, 12 Jul 2023 06:24:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/A53-core-suspend/m-p/1686283#M209104</guid>
      <dc:creator>Lakshmi_AG</dc:creator>
      <dc:date>2023-07-12T06:24:30Z</dc:date>
    </item>
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