topic Re: iMX8M Mini Row addressing in i.MX Processors

iMX8M Mini Row addressing

jeroenvanandel — Wed, 11 Nov 2020 10:35:30 GMT

I have a question about the "Number of ROW Addresses" in the i.MX8MM (m845) DDR Controller Configuration Spreadsheet.

The default memory device used in the Spreadsheet is the MT53D512M32D2DS-053 WT:D.

The datasheet of the LPDDR4 memory device mentions 15 row addresses (see LPDDR4.PNG)
In the Configuration Spreadsheet the row addresses are filled in as 16.

Can you explain the difference.

Re: iMX8M Mini Row addressing

weidong_sun — Thu, 12 Nov 2020 03:04:33 GMT

Hi jeroenvanandel

You need to pay attention to 2 points:
1. If you find that the numbers in the RPA tool are inconsistent with the datasheet, you need to modify it according to the datasheet.
2. You need to ensure that your configuration is the same as the actual total memory size on the board.

Hope this information is helpful to you.

Have a nice day!

B.R,

weidong

Re: iMX8M Mini Row addressing

Udhay_ — Mon, 10 Jul 2023 09:39:14 GMT

@weidong_sun

https://community.nxp.com/t5/i-MX-Processors/Reduce-DRAM-and-CPU-frequency-U-Boot-in-imx8mm/m-p/1682793#M208766

follow this link and i am not able boot lpddr4_timing.c but i have successfully flashed from ddr tool i think i need new ddr tool for imx8mm_lpddr4

we required #include <asm/arch/imx8m_ddr.h> this file we can not able to find this file in my u-boot or any other resources