[IMX8X] Interruption between A35 and M4 (user) core

VPalermini — Wed, 05 Jul 2023 11:27:11 GMT

Hi,

To set up the context, I am using the IMX8XQXP product in order to develop a communication based on the messagery unit between the A35 and M4 core.
I precise that I am programming in bare-metal on A35 core, and FreeRTOS on M4 one.
I started from the demonstration, that I found in the MCU Xpresso SDK, e.g the rpmsg or the power-down one.

I observe with the help of my Lauterbach probe, that I manage to create a general interruption, send from MU5_B (M4 side) to MU5_A (A35 side), the GIE[3] register is on "pending" on the side A of the channel.

Nevertheless, I didn't manage to treat the interruption on the A35 side. From the reference manual, I've seen that MU5_INT_A is attach to the IRQ vector 216. Thus, I manage to program the "enable" register of the GIC-500 corresponding to the IRQ 216 but nothing append.

Finally, I manage to active with the help of the Lauterbach probe in order to validate that my handler and my activation of the interruption is well done on the A35.

Is there something else to do, to attach the good IRQ to MU5_A in the GIC engine ?

Thank you advance.
Vincent PALERMINI

Re: [IMX8X] Interruption between A35 and M4 (user) core

Sanket_Parekh — Fri, 07 Jul 2023 10:22:06 GMT

Hi @VPalermini

I hope you are doing well

The interrupt process is detailed in section 18.8.2.8 Interrupt Messaging Protocols of the Reference Manual IMX8DQXPRM.

For more information, kindly refer to the discussion from the thread below for the same query.
https://community.nxp.com/t5/i-MX-Processors/How-to-trigger-software-interrupt-from-iMX8-A35-to-M4/td-p/1002384

Thanks & Regards,
Sanket Parekh

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[IMX8X] Interruption between A35 and M4 (user) core

Re: [IMX8X] Interruption between A35 and M4 (user) core