Change of memory mapping and MPU problems

dz1 — Thu, 22 Jun 2023 07:37:28 GMT

Hello everyone,

we are working with a i.MX RT1051 and I am currently trying to change the memory layout so that the available 256kB of internal memory is split between ITCM and DTCM at 128kB each. So the default layout 64kB ITCM, 64kB DTCM and 128kB OCRAM shall be changed to 128kB ITCM/DTCM and 0kB OCRAM. The memory change is made with the help of the registers GPR16 and GPR17 directly in the startup.s file.

This works, but only until the MPU is configured and activated. Directly after the activation of the MPU after the execution of the next function a HardFault is set. According to the Fault Report from Keil µVision the address which allegedly leads to the HardFault is an address on the stack. The memory area of the stack is definitely correctly enabled by MPU. Also, after activating the MPU, I can directly access the "faulty" address read/write without a HardFault being generated. It looks like pushing to the stack causes the problem.

Best regards

Daniel

Best Regards Daniel

Re: Change of memory mapping and MPU problems

kerryzhou — Tue, 27 Jun 2023 01:56:03 GMT

Hi @dz1 ,

RT1051 have 512KB internal RAM, not 256KB.

For the flexRAM configuration, you can refer to the AN12077:

https://www.nxp.com/docs/en/application-note/AN12077.pdf

The yellow one can't be selected.

0kB OCRAM is also not be used, as Consider at least 64 KB for the OCRAM configuration because the ROM code requires this portion of RAM for execution (stack/static data).

So, please refer to the AN and choose the correct reallocate again.

If you still have issues with it, just kindly let me know.

Best Regards,

Kerry

topic Change of memory mapping and MPU problems in i.MX Processors

Change of memory mapping and MPU problems

Re: Change of memory mapping and MPU problems