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    <title>i.MX Processors中的主题 Re: Configuring nvsram (anvo) 1Mb on board with i.mx8mp</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1666987#M207391</link>
    <description>&lt;P&gt;Hello,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Thank you for your reply.&lt;/P&gt;&lt;P&gt;I have made the necessary changes as per above suggestions&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;STRONG&gt;CONFIG_NVMEM = y and&amp;nbsp;CONFIG_EEPROM_AT25=y&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;I have also changed iomux pincrtl as follows&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;pinctrl_ecspi2: ecspi2grp {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;fsl,pins = &amp;lt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x1c2&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x1c2&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x82&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;But I am not getting any devices in &lt;STRONG&gt;/sys/bus/nvmem/devices/.&amp;nbsp;&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;Am I still missing anything? Please suggest any solution. Thank you.&lt;/DIV&gt;</description>
    <pubDate>Fri, 09 Jun 2023 13:17:39 GMT</pubDate>
    <dc:creator>gaurav_bankar</dc:creator>
    <dc:date>2023-06-09T13:17:39Z</dc:date>
    <item>
      <title>Configuring nvsram (anvo) 1Mb on board with i.mx8mp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1663201#M207060</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; I want to configure nvSRAM&amp;nbsp;ANV32AA1W from anvo into my customized board with i.mx8mp processor.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; I have included it in DTS as follows&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;&amp;amp;ecspi2 {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#address-cells = &amp;lt;1&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#size-cells = &amp;lt;0&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;fsl,spi-num-chipselects = &amp;lt;1&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl-names = "default";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ecspi2 &amp;amp;pinctrl_ecspi2_cs&amp;gt;;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;cs-gpios = &amp;lt;&amp;amp;gpio5 13 GPIO_ACTIVE_LOW&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = "okay";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;nvram: nvram@0 {&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;compatible = "anvo,anv32aa1w", "atmel,at25";&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reg = &amp;lt;0&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;spi-max-frequency = &amp;lt;20000000&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;spi-cpha;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;spi-cpol;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pagesize = &amp;lt;128&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;size = &amp;lt;131072&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;address-width = &amp;lt;24&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;and pinctrl as follows&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;pinctrl_ecspi2: ecspi2grp {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;fsl,pins = &amp;lt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl_ecspi2_cs: ecspi2cs {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;fsl,pins = &amp;lt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Is this correctly mentioned in the DTS? I am not able to see this device in the /dev directory. How can I access this memory in the user space?&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Mon, 05 Jun 2023 06:40:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1663201#M207060</guid>
      <dc:creator>gaurav_bankar</dc:creator>
      <dc:date>2023-06-05T06:40:00Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring nvsram (anvo) 1Mb on board with i.mx8mp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1664334#M207192</link>
      <description>&lt;DIV&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/146471"&gt;@gaurav_bankar&lt;/a&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;I hope you are doing well.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;device tree changes look correct.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Please make sure that the driver with compatible properties "anvo,anv32aa1w", "atmel,at25"; is correctly enabled in the kernel configuration.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Please make sure that below mentioned option is enabled in the kernel configuration.&lt;/DIV&gt;
&lt;DIV&gt;&lt;STRONG&gt;CONFIG_EEPROM_AT25=y&lt;BR /&gt;&lt;/STRONG&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Please share boot logs for further&amp;nbsp;debugging.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Thanks &amp;amp; Regards&lt;/DIV&gt;
&lt;DIV&gt;Sanket Parekh&lt;/DIV&gt;</description>
      <pubDate>Tue, 06 Jun 2023 12:11:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1664334#M207192</guid>
      <dc:creator>Sanket_Parekh</dc:creator>
      <dc:date>2023-06-06T12:11:03Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring nvsram (anvo) 1Mb on board with i.mx8mp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1664848#M207237</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/202155"&gt;@Sanket_Parekh&lt;/a&gt;&amp;nbsp;,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;Thank you for the clarification. I will make sure the option is enabled in the kernel configuration and test it. Here is the bootlog.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;Also after everything is correct will I get an entry in /dev as /dev/nvram? How will my nvram be mounted in the rootfs?&lt;/P&gt;</description>
      <pubDate>Wed, 07 Jun 2023 06:05:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1664848#M207237</guid>
      <dc:creator>gaurav_bankar</dc:creator>
      <dc:date>2023-06-07T06:05:19Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring nvsram (anvo) 1Mb on board with i.mx8mp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1666178#M207322</link>
      <description>&lt;P&gt;&lt;SPAN class="im"&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/146471"&gt;@gaurav_bankar&lt;/a&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV&gt;I hope you are doing well.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Please add the below-mentioned option in&amp;nbsp;the&amp;nbsp;kernel for the nvmem interface.&lt;/DIV&gt;
&lt;DIV&gt;&lt;STRONG&gt;CONFIG_NVMEM = y&lt;/STRONG&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Please use the below command to list nvmem devices.&lt;/DIV&gt;
&lt;DIV&gt;#&lt;STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;ls /sys/bus/nvmem/devices/&lt;/STRONG&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;STRONG&gt;&amp;nbsp;&lt;/STRONG&gt;&lt;/DIV&gt;
&lt;DIV&gt;Also after everything is correct will I get an entry in /dev as /dev/nvram?&lt;/DIV&gt;
&lt;DIV&gt;[Ans]: /dev/nvram might not be available&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;One can read&amp;nbsp;&lt;STRONG&gt;nvmem&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;data using the below-mentioned&amp;nbsp;command.&lt;/DIV&gt;
&lt;DIV&gt;#&lt;STRONG&gt;&amp;nbsp;hexdump /sys/bus/nvmem/devices/&amp;lt;&lt;WBR /&gt;device_name&amp;gt;/nvmem&lt;/STRONG&gt;&lt;/DIV&gt;
&lt;DIV&gt;&lt;STRONG&gt;&amp;nbsp;&lt;/STRONG&gt;&lt;/DIV&gt;
&lt;DIV&gt;One can read/write nvmem data at&amp;nbsp;/sys/bus/nvmem/devices/&amp;lt;&lt;WBR /&gt;device_name&amp;gt;/nvmem.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Please refer to the below-mentioned kernel documentation.&lt;/DIV&gt;
&lt;DIV&gt;1.&lt;A href="https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/Documentation/driver-api/nvmem.rst" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/Documentation/driver-api/nvmem.rst&amp;amp;source=gmail&amp;amp;ust=1686312774892000&amp;amp;usg=AOvVaw1QK1UYXo6SAMI_Ira1U0LW"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;linux-imx/Documentation/&lt;WBR /&gt;driver-api/nvmem.rst&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV&gt;2.&lt;A href="https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/Documentation/ABI/stable/sysfs-bus-nvmem" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/Documentation/ABI/stable/sysfs-bus-nvmem&amp;amp;source=gmail&amp;amp;ust=1686312774892000&amp;amp;usg=AOvVaw0BPzv04UxIF062BVyFQxzI"&gt;&amp;nbsp;linux-imx/Documentation/&lt;WBR /&gt;ABI/stable/sysfs-bus-nvmem&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Thanks &amp;amp; Regards,&lt;/DIV&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;Sanket Parekh&lt;/P&gt;</description>
      <pubDate>Thu, 08 Jun 2023 12:16:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1666178#M207322</guid>
      <dc:creator>Sanket_Parekh</dc:creator>
      <dc:date>2023-06-08T12:16:04Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring nvsram (anvo) 1Mb on board with i.mx8mp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1666987#M207391</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Thank you for your reply.&lt;/P&gt;&lt;P&gt;I have made the necessary changes as per above suggestions&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;STRONG&gt;CONFIG_NVMEM = y and&amp;nbsp;CONFIG_EEPROM_AT25=y&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;I have also changed iomux pincrtl as follows&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;pinctrl_ecspi2: ecspi2grp {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;fsl,pins = &amp;lt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x1c2&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x1c2&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x82&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;But I am not getting any devices in &lt;STRONG&gt;/sys/bus/nvmem/devices/.&amp;nbsp;&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;Am I still missing anything? Please suggest any solution. Thank you.&lt;/DIV&gt;</description>
      <pubDate>Fri, 09 Jun 2023 13:17:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1666987#M207391</guid>
      <dc:creator>gaurav_bankar</dc:creator>
      <dc:date>2023-06-09T13:17:39Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring nvsram (anvo) 1Mb on board with i.mx8mp</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1667490#M207427</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/202155"&gt;@Sanket_Parekh&lt;/a&gt;,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; We have changed our dts to be compatible with microchip mchp23k256/mchp23lcv1024. This is the driver for microchip SPI based sram.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;Here is the DTS&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;&amp;amp;ecspi2 {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;fsl,spi-num-chipselects = &amp;lt;1&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl-names = "default";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ecspi2&amp;gt;;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = "okay";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;nvram:spi-sram@0{&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#address-cells = &amp;lt;1&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#size-cells = &amp;lt;1&amp;gt;;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; compatible = "anvo,anv32aa1w","microchip,mchp23lcv1024";&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;reg = &amp;lt;0&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;spi-max-frequency = &amp;lt;40000000&amp;gt;;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;here is the iomux pincrtl&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;pinctrl_ecspi2: ecspi2grp {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;fsl,pins = &amp;lt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x1c2&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x1c2&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;MX8MP_IOMUXC_ECSPI2_SS0__ECSPI2_SS0 0x1c2&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;With this change I am able to get nvram as a mtd device&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;root@taswp500:~# cat /proc/mtd&lt;BR /&gt;dev: size erasesize name&lt;BR /&gt;&lt;STRONG&gt;mtd0: 00020000 00000000 "spi0.0"&lt;/STRONG&gt;&lt;BR /&gt;mtd1: 02000000 00010000 "30bb0000.spi"&lt;BR /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;But the erasesize is zero.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;root@taswp500:/sys/bus/nvmem/devices# ls&lt;BR /&gt;imx-ocotp0 mtd0 mtd1&lt;BR /&gt;root@taswp500:/sys/bus/nvmem/devices# cd mtd0/&lt;BR /&gt;root@taswp500:/sys/bus/nvmem/devices/mtd0# ls -l&lt;BR /&gt;total 0&lt;BR /&gt;-r--r--r-- 1 root root 4096 Jun 12 10:52 consumers&lt;BR /&gt;-r-------- 1 root root 0 Jun 12 10:52 nvmem&lt;BR /&gt;drwxr-xr-x 2 root root 0 Jun 12 10:52 power&lt;BR /&gt;lrwxrwxrwx 1 root root 0 Jun 12 10:08 subsystem -&amp;gt; ../../../../../../../../../../../bus/nvmem&lt;BR /&gt;-r--r--r-- 1 root root 4096 Jun 12 10:52 suppliers&lt;BR /&gt;-r--r--r-- 1 root root 4096 Jun 12 10:52 type&lt;BR /&gt;-rw-r--r-- 1 root root 4096 Jun 12 10:08 uevent&lt;BR /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;As per your previous comment,&amp;nbsp; I am not able to read/write at&amp;nbsp;/sys/bus/nvmem/devices/&amp;lt;device_name&amp;gt;/nvmem.&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;What should I do next?&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&amp;nbsp;&lt;/DIV&gt;</description>
      <pubDate>Mon, 12 Jun 2023 11:09:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-nvsram-anvo-1Mb-on-board-with-i-mx8mp/m-p/1667490#M207427</guid>
      <dc:creator>gaurav_bankar</dc:creator>
      <dc:date>2023-06-12T11:09:11Z</dc:date>
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