<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: IMX8M MIPI DSI device tree question in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-MIPI-DSI-device-tree-question/m-p/1663551#M207101</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;It looks like the pincontrol is not dong it jobs cause it have use a gpio in another part of the device tree. But besides that you need module to have the MIPI-DSI running.&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 05 Jun 2023 14:34:16 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2023-06-05T14:34:16Z</dc:date>
    <item>
      <title>IMX8M MIPI DSI device tree question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-MIPI-DSI-device-tree-question/m-p/1661952#M206955</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am attempting to get MIPI DSI signals out from my imx8m - however I don't think I have my device tree configured quite right and I need some help.&lt;/P&gt;&lt;P&gt;I am including these from imx8mm.dtsi:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;aips4: bus@32c00000 {
			compatible = "fsl,aips-bus", "simple-bus";
			reg = &amp;lt;0x32c00000 0x400000&amp;gt;;
			#address-cells = &amp;lt;1&amp;gt;;
			#size-cells = &amp;lt;1&amp;gt;;
			ranges = &amp;lt;0x32c00000 0x32c00000 0x400000&amp;gt;;

			lcdif: lcdif@32e00000 {
				#address-cells = &amp;lt;1&amp;gt;;
				#size-cells = &amp;lt;0&amp;gt;;
				compatible = "fsl,imx8mm-lcdif";
				reg = &amp;lt;0x32e00000 0x10000&amp;gt;;
				clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_LCDIF_PIXEL&amp;gt;,
					 &amp;lt;&amp;amp;clk IMX8MM_CLK_DISP_AXI_ROOT&amp;gt;,
					 &amp;lt;&amp;amp;clk IMX8MM_CLK_DISP_APB_ROOT&amp;gt;;
				clock-names = "pix", "disp-axi", "disp-apb";
				assigned-clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_LCDIF_PIXEL&amp;gt;,
						  &amp;lt;&amp;amp;clk IMX8MM_CLK_DISP_AXI&amp;gt;,
						  &amp;lt;&amp;amp;clk IMX8MM_CLK_DISP_APB&amp;gt;;
				assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MM_VIDEO_PLL1_OUT&amp;gt;,
							 &amp;lt;&amp;amp;clk IMX8MM_SYS_PLL2_1000M&amp;gt;,
							 &amp;lt;&amp;amp;clk IMX8MM_SYS_PLL1_800M&amp;gt;;
				assigned-clock-rate = &amp;lt;594000000&amp;gt;, &amp;lt;500000000&amp;gt;, &amp;lt;200000000&amp;gt;;
				interrupts = &amp;lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&amp;gt;;
				lcdif-gpr = &amp;lt;&amp;amp;dispmix_gpr&amp;gt;;
				resets = &amp;lt;&amp;amp;lcdif_resets&amp;gt;;
				power-domains = &amp;lt;&amp;amp;dispmix_pd&amp;gt;;
				status = "disabled";

				lcdif_disp0: port@0 {
					reg = &amp;lt;0&amp;gt;;

					lcdif_to_dsim: endpoint {
						remote-endpoint = &amp;lt;&amp;amp;dsim_from_lcdif&amp;gt;;
					};
				};
			};

			mipi_dsi: mipi_dsi@32e10000 {
				#address-cells = &amp;lt;1&amp;gt;;
				#size-cells = &amp;lt;0&amp;gt;;
				compatible = "fsl,imx8mm-mipi-dsim";
				reg = &amp;lt;0x32e10000 0x400&amp;gt;;
				clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_DSI_CORE&amp;gt;,
					 &amp;lt;&amp;amp;clk IMX8MM_CLK_DSI_PHY_REF&amp;gt;;
				clock-names = "cfg", "pll-ref";
				assigned-clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_DSI_CORE&amp;gt;,
						  &amp;lt;&amp;amp;clk IMX8MM_CLK_DSI_PHY_REF&amp;gt;;
				assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MM_SYS_PLL1_266M&amp;gt;,
							 &amp;lt;&amp;amp;clk IMX8MM_CLK_24M&amp;gt;;
				assigned-clock-rates = &amp;lt;266000000&amp;gt;, &amp;lt;12000000&amp;gt;;
				interrupts = &amp;lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&amp;gt;;
				dsi-gpr = &amp;lt;&amp;amp;dispmix_gpr&amp;gt;;
				resets = &amp;lt;&amp;amp;mipi_dsi_resets&amp;gt;;
				power-domains = &amp;lt;&amp;amp;mipi_pd&amp;gt;;
				status = "disabled";

				port@0 {
					dsim_from_lcdif: endpoint {
						remote-endpoint = &amp;lt;&amp;amp;lcdif_to_dsim&amp;gt;;
					};
				};
			};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In my device tree I have edited the properties as follows:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;&amp;amp;i2c4 {
	#address-cells = &amp;lt;1&amp;gt;;
	#size-cells = &amp;lt;0&amp;gt;;
	clock-frequency = &amp;lt;100000&amp;gt;; /* 100kHz */
	pinctrl-names = "default";
	pinctrl-0 = &amp;lt;&amp;amp;pinctrl_i2c4&amp;gt;;
	status = "okay";
	
	lt_bridge: lt9211@2d {
		compatible = "lontium,lt9211";
		reg=&amp;lt;0x2d&amp;gt;;
		pinctrl-0 = &amp;lt;&amp;amp;pinctrl_lt9211&amp;gt;;
		reset-gpios = &amp;lt;&amp;amp;gpio5 10 GPIO_ACTIVE_LOW&amp;gt;;
		/*vccio-supply = &amp;lt;&amp;amp;??&amp;gt;;*/
		status = "okay";

		ports {
			#address-cells = &amp;lt;1&amp;gt;;
			#size-cells = &amp;lt;0&amp;gt;;
			
			port@0 { /*primary input*/
            			reg = &amp;lt;0&amp;gt;;
            			lt9211_mipi_in: endpoint {
				      remote-endpoint = &amp;lt;&amp;amp;host_mipi_out&amp;gt;;
				};
			};

          		/*port@2 { /
            			reg = &amp;lt;2&amp;gt;;
            			lt9211_mipi_out: endpoint {
              				remote-endpoint = &amp;lt;&amp;amp;dsim_from_lcdif&amp;gt;;
            			};
          		};*/
		};
	}; 
};

&amp;amp;lcdif {
	status = "okay";
};

&amp;amp;mipi_dsi {
	status = "okay";
	
	port@1 {
		host_mipi_out: endpoint {
			remote-endpoint = &amp;lt;&amp;amp;lt9211_mipi_in&amp;gt;;
			/*attach-bridge; not needed ??? */
		};
	};
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have verified that the i2c bus works. I am able to use "gpioset 4 10=1" to activate my lt9211 and it responds to commands send over the i2cset and i2cget. &amp;nbsp;&lt;/P&gt;&lt;P&gt;I am a bit confused regarding&amp;nbsp;&lt;BR /&gt;&lt;A href="https://www.kernel.org/doc/Documentation/devicetree/bindings/display/bridge/lontium%2Clt9211.yaml" target="_blank"&gt;https://www.kernel.org/doc/Documentation/devicetree/bindings/display/bridge/lontium%2Clt9211.yaml&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;which lists both port0 and port2 as required properties. Is port2 supposed to be lcdif_to_dsim or something else? Do I add a new data line to the mipi_dsi node?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The current tree outputs error:&lt;/P&gt;&lt;P&gt;[ 2.216086] [drm:drm_bridge_attach] *ERROR* failed to attach bridge /soc@0/bus@32c00000/mipi_dsi@32e10000 to encoder DSI-34: -19&lt;BR /&gt;[ 2.235960] imx_sec_dsim_drv 32e10000.mipi_dsi: failed to bind sec dsim bridge: -19&lt;/P&gt;</description>
      <pubDate>Thu, 01 Jun 2023 14:51:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-MIPI-DSI-device-tree-question/m-p/1661952#M206955</guid>
      <dc:creator>J_W</dc:creator>
      <dc:date>2023-06-01T14:51:28Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8M MIPI DSI device tree question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-MIPI-DSI-device-tree-question/m-p/1663551#M207101</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;It looks like the pincontrol is not dong it jobs cause it have use a gpio in another part of the device tree. But besides that you need module to have the MIPI-DSI running.&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 05 Jun 2023 14:34:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-MIPI-DSI-device-tree-question/m-p/1663551#M207101</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2023-06-05T14:34:16Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8M MIPI DSI device tree question</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-MIPI-DSI-device-tree-question/m-p/1665002#M207249</link>
      <description>Yes, of course I need a module. I have a module - that's what I'm trying to load when I get the error. I have discovered that the error is likely due to missing the port2 to Display driver in the device tree. I am a bit unsure how to bind it though.</description>
      <pubDate>Wed, 07 Jun 2023 08:33:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-MIPI-DSI-device-tree-question/m-p/1665002#M207249</guid>
      <dc:creator>J_W</dc:creator>
      <dc:date>2023-06-07T08:33:13Z</dc:date>
    </item>
  </channel>
</rss>

